Confusion with COP and BDM: Catching a COP reset with BDM & MC9S08xx

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Confusion with COP and BDM: Catching a COP reset with BDM & MC9S08xx

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PG1
Contributor I

I have a multilink BDM connected to a target MC9S08xx processor. The code locks in the COP as ENABLED.

I set a breakpoint at the first line of code to execute after a reset.

 

When I hit run after encountering the breakpoint, the target's code runs into an infinite loop and the COP times out. 

 

However the BDM does not break. The target keeps running into the infinite loop and resetting, over and over with each COP timeout. 

 

I am guessing  this is because the COP reset wiped out the breakpoint in the debug registers.

 

If I am wrong, and the BDM should break at the first line of execution after a COP reset, please let me know.

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rocco
Senior Contributor II

Hi PG1,

 

At least in the S08GB60, resets do not clear breakpoints. You do not mention which S08 you are using, but maybe it's different for different derivatives.

 

I have a routine that runs very soon after reset that reads the SRS register to report the cause of each reset. I often set a breakpoint at the instruction following the read of SRS, and that breakpoint has never been cleared when I didn't want it to be. That is how I catch my watchdog timeouts.

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PG1
Contributor I

I am using the S08LL36 and soon will be migrating up to S08LL64 as our marketing department creeps the spec.

 

I will give some of your ideas  a try, thanks alot!

 

But I can say for certain that if you set a breakpoint at the first line of machine code that executes after a reset, and the COP fires, the breakpoint does not halt the LL36 using a PE Multilink/Codwarrior 6.3 on Win XP.

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bigmac
Specialist III

Hello,

 

It is not specifically answering your query, but a possible alternative approach is to use the following code at the start of main().  Active BDM mode should be entered whenever a reset is caused by COP, ILOP or ILAD reset events -

 

#define __DEBUG...void main( void){#ifdef __DEBUG   if (SRS & 0x38)  __asm BGND;#endif...}

 

Regards,

Mac

 

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kef
Specialist I

Mac,

 

I think that all resets, including COP and others,  are resetting also BDM (and HW breakpoints), which should disable active BDM mode and make BGND instruction illegal, until BDM is activated again. Am I wrong?

 

To debug over resets, I think one needs to insert wait forever loop somewhere at start of program. When reset hits, CPU will enter this for(;:smileywink: loop and wait until you reconnect with your debugger and force program counter to exit for loop.

 

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