iMXRT1050 XIP from QSPI NOR Flash is slow

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iMXRT1050 XIP from QSPI NOR Flash is slow

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Contributor III

Hi all,

We are planning to run a webpage on device, using a i.MX RT1052 controller. The code is based on a sample lwip httpsrv example running on top of FreeRTOS, provided with the iMXRT SDK. The code is executing from the QSPI flash (ISSI IS25WP064A) in XIP mode. The On Chip Ram is used as the main ram section. The QSPI flash is in SDR mode, running at 130 Mhz. It uses 6B (Fast Read Quad Output) for read accesses. The webpage has 3 images (around 30KByte).

ISSUE 1

The webpage takes around 3 to 4 seconds to load (the images specifically).

> Why is this delay...?

We the reduced the QSPI clock from 130Mhz to 60Mhz. This almost doubles the loading time. So, we concluded that the QSPI in XIP may be the cause. So..

> Will changing the flash read sequence from Fast Read Quad Output (6B) to Fast Read Quad IO (EB) or changing the flash mode to QPI mode, make any visible change...?

 

ATTEMPTS MADE

Tried to change Read Command from 6B to EB:

   We tried to change the LUT sequence from using 6Bh, to the one given in the iMX RT reference manual  -> Chapter    30: FlexSPI Controler -> Application Information -> Application on Serial NOR Flash Device -> QUAD IO Fast Read    Command.-> Non-QPI mode, Non-Continous read mode.

ISSUE 2

Updating the LUT table with this Read Sequence halts the execution.

> Do we have to specify anything more, other than the one given in the above said section...?

This is the Read Sequence we used.

[4 * QSPI_CMD_LUT_READDATA] =

 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xEB,
                                       kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 0x18),
[4 * QSPI_CMD_LUT_READDATA + 1] =
 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_MODE8_SDR, kFLEXSPI_4PAD, 0x00,
                                      kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x08),
[4 * QSPI_CMD_LUT_READDATA + 2] =
 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04,
                                      kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x00),

Also, is there any sample code that is intended to help developers working on QSPI flash.

Thanks 

2winkle.

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NXP TechSupport
NXP TechSupport

Hi Twinkle

the RT1050 SDK includes CMSIS functions to enable/disable/invalidate/clean the cache and set
cache policies for memory regions using the MPU, please check the core_cm7.h header file. Also

please check the Board_ConfigMPU() function in board.c of the demo projects.

The i.MXRT1050 EVK Extension Feature Example Code and HW Guide has a QSPI
polling example (executing from RAM) that includes the LUT for the ISSI QSPI flash on the EVK.

i.MX RT1050 MCU/Applications Crossover Processor | Arm® Cortex®-M7 @600 MHz, 512KB SRAM |NXP 

Best regards
igor
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1 Reply
147 Views
NXP TechSupport
NXP TechSupport

Hi Twinkle

the RT1050 SDK includes CMSIS functions to enable/disable/invalidate/clean the cache and set
cache policies for memory regions using the MPU, please check the core_cm7.h header file. Also

please check the Board_ConfigMPU() function in board.c of the demo projects.

The i.MXRT1050 EVK Extension Feature Example Code and HW Guide has a QSPI
polling example (executing from RAM) that includes the LUT for the ISSI QSPI flash on the EVK.

i.MX RT1050 MCU/Applications Crossover Processor | Arm® Cortex®-M7 @600 MHz, 512KB SRAM |NXP 

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

View solution in original post