i.MXRT1052 Common clock source for peripherals

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i.MXRT1052 Common clock source for peripherals

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878 次查看
eamonnheffernan
Contributor III

Hi, I'd like to clock a bunch of peripherals from a common clock source, to generate some complex synchronized waveforms. Peripherals of interest include FlexIO2, FlexPWM, LPSPI, QTIMER.

Reference Manual Rev 4, Table 14-4 (System Clocks, Gating and Override) suggests that I could use ipg_clock_root for all of these peripherals. I've searched the RM, but can't find any way to switch say FLEXIO2 from FLEXIO2_CLK_ROOT to IPG_CLK_ROOT.

Is this possible, and if so, how do I go about doing it?

I'd appreciate any hints.

Thanks

Eamonn

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1 解答
769 次查看
mjbcswitzerland
Specialist V

Eamonn

The FLEXIO2_CLK_ROOT is used for bus accesses and so is probably not relevant for synchronisation of peripherals (as long as fast enough to allow other clocks to be recognised).
A possibility is to output IPG_CLK_ROOT on a CLKO pin and feed that to a FlexIO (clock) input pin so that its functionality is then synchronised to the same clock source as used by other peripherals.

Regards

Mark

[uTasker project developer for Kinetis and i.MX RT]

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769 次查看
jeremyzhou
NXP Employee
NXP Employee

Hi Eamonn Heffernan,

Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
I'm not very clear with your question, whether you change the root clock of the XXXX_flexio_clk from the XXXX_clk_roor to ipg_clk_root.
If yes, I'm afraid it's impossible.

pastedImage_1.png

Have a great day,
TIC

 

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769 次查看
eamonnheffernan
Contributor III

Hi Jeremy,

To be clear, I would like to change the root clock of FlexIO2 from flexio2_clk_root to ipg_clk_root, as the RM seems to suggest. I need to use the same clock for a few different peripherals. If it's impossible, why does the RM suggest that it is possible? What does Table 14-4 mean? Why is ipg_clk_root mentioned if it cannot be used?

Thank you very much for taking the time to look at this issue.

Best - Eamonn

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770 次查看
mjbcswitzerland
Specialist V

Eamonn

The FLEXIO2_CLK_ROOT is used for bus accesses and so is probably not relevant for synchronisation of peripherals (as long as fast enough to allow other clocks to be recognised).
A possibility is to output IPG_CLK_ROOT on a CLKO pin and feed that to a FlexIO (clock) input pin so that its functionality is then synchronised to the same clock source as used by other peripherals.

Regards

Mark

[uTasker project developer for Kinetis and i.MX RT]

769 次查看
eamonnheffernan
Contributor III

Mark Butcher wrote:

A possibility is to output IPG_CLK_ROOT on a CLKO pin and feed that to a FlexIO (clock) input pin so that its functionality is then synchronised to the same clock source as used by other peripherals.

Great idea, Mark. I'll look into this. Thank you very much.

-Eamonn

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