SDRAM ECC

[Ootsuka]

Hello teams.

We designed an i.MX RT1171 custom board and connect it to the SDRAM on the SEMC bus.
Please tell us how to enable ECC.

We enabled XECC_SEMC[ECC_CTRL] bit2-0 and address settings, but it doesn't work.
Must be set to the eFUSE 0x840[3] bit?
Is there any other settings ?

Best regards.

[Ootsuka]

Thank you very much for answer.

[jay_heng · Accepted solution]

eFUSE 0x840[3] bit should be burnt to enable XECC module, or XECC is inactive by default.

See my blog for XECC enablement.

https://www.cnblogs.com/henjay724/p/15204125.html