RT1052 LPUART FIFO depth is only 1?

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RT1052 LPUART FIFO depth is only 1?

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lixiaotian
Contributor I

the LPUART Parameter Register (PARAM) is read as 0. So what is the meaning of the fifo?

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1277185193
Contributor III

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jeremyzhou
NXP Employee
NXP Employee

Hi li xiaotian,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
Please check the LPUART[FIFO] register.

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Have a great day,
TIC

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1277185193
Contributor III

Excuse me ...How to change the fifo depth? This field is read only......B8JKEAKPH0~9X6(7E_{784D.png

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jeremyzhou
NXP Employee
NXP Employee

Hi 卢 鲲,

Thanks for your reply.
It's not able to customize to configure the depth of the buffer, you only can enable the buffer or discard this feature.
Have a great day,
TIC

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1277185193
Contributor III
  • OK!  Excuse me ......Are you an official with NXP ?

    It's so unbelievable...Why are there so many options of fifosize?
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