RT1050 ENET_INT pin direction

[felix1]

Hi,

according to RT1050 EVK, pin ENET_INT pin is input, 

In SDK example evkbimxrt1050_lwip_ping_freertos and other lwip examples,

the ENET_INT (GPIO_AD_B0_10) seems output, do I miss something?

int main(void)
{
    gpio_pin_config_t gpio_config = {kGPIO_DigitalOutput, 0, kGPIO_NoIntmode};

    BOARD_ConfigMPU();
    BOARD_InitBootPins();
    BOARD_InitBootClocks();
    BOARD_InitDebugConsole();
    BOARD_InitModuleClock();

    IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, true);

    GPIO_PinInit(GPIO1, 9, &gpio_config);
    GPIO_PinInit(GPIO1, 10, &gpio_config);
    /* Pull up the ENET_INT before RESET. */
    GPIO_WritePinOutput(GPIO1, 10, 1);
    GPIO_WritePinOutput(GPIO1, 9, 0);
    SDK_DelayAtLeastUs(10000, CLOCK_GetFreq(kCLOCK_CpuClk));
    GPIO_WritePinOutput(GPIO1, 9, 1);

[Pavel_Hernandez]

Hello, my name is Pavel, and I will be supporting your case, I will review it, and in case the error reporting is right, I will need the information on the version of the schematic. Could you share more information about where you see this?

Best regards,
Pavel 

[felix1]

Hi  Pavel,

You can see the schematic in the attached file.

In the reference manual, it also set as input, so I doubt the example do this operation for some purpose.

[Pavel_Hernandez]

Hello, I made the report, and the team confirmed the issue was reported before, they will update this in the next release.

Best regards,
Pavel

[felix1]

Hi Pavel,
Can you tell me ENET_INT should be input or output first? I need this information to correct my code.

[Pavel_Hernandez · Accepted solution]

Hello, sorry it should be as input, how is mentioned in the RM.

Best regards,
Pavel

[felix1]

Hi Pavel,

1) In example evkbimxrt1050_lwip_ping_freertos, except to change ENET_INT as input, what else should I do?

2) Where can I find example evkbimxrt1050_lwip_ping_freertos in the mcuxpresso github 

https://github.com/nxp-mcuxpresso/mcux-sdk/tree/main/boards/evkbimxrt1050 ?

[MultipleMonomials]

Wait, hold up, I've run into this issue before in my testing. ENET_INT actually is an output pin, in a way.  The reason is, the ENET_INT pin actually does double duty as the NAND_TREE strapping pin on the PHY

This means that when reset is released for the phy, the ENET_INT line needs to be logic high so that the phy doesn't go into NAND_TREE test mode (which makes it basically inert).

If you wish to use the ENET_INT line to get interrupts from the phy, you can use it as an input, you just have to reconfigure it to input after the phy has been reset and has booted up. 

However, you may run into issues because of an error in the schematic that I noticed: the ENET_INT line is both pulled up and pulled down by resistors!

This means it will quite possibly be stuck at 1.6V unless you remove the pulldown resistor from your eval kit. This screenshot is from the 1060 EVK rev B, unsure if other EVKs have the same issue.

[felix1]

Hi @MultipleMonomials ,

Thanks for your information.

My customer board solder both the pull-up and pull-down resistors for ENET_INT pin as EVK, so it output 1.65V to PHY. 

According to your test, any problem you meet?

[MultipleMonomials]

It seems like, on the EVK board, we do get away with it and the phy recognizes it as a logic high.  But I'm not sure I'd trust that on a production board.