In the data sheet for iMX RT 1064 processors there is a wide range of available CPU clock rates.
400, 500/528, 600, 700, 800, and 1000mHz
It is my understanding that the CPU clock rate is set by a multiplier of PLL1 of the clock system. 22x = 528, 25x = 600, etc.
Am I correct?
I am using the NXP SDK Board_ConfigMPU(), Board_InitBootPins(), and Boot_InitBootClock() functions as part of startup.
I have tried to find information in the iMX reference manual on how to detect and set the CPU clock, but have failed.
How is the CPU clock rate set?
If I have firmware running on different clock rate processors, how does the firmware detect the differences and set the CPU clock?
Hi
There is a practical clocking guide at
https://www.utasker.com/docs/iMX/i.MX_RT_1064_uTasker.pdf
which may help.
Much is the same as the 1021 - https://www.utasker.com/docs/iMX/i.MX_RT_1021_uTasker.pdf and the 1064 document mainly only explains the differences from the 1021 one.
Regards
Mark
[uTasker project developer for Kinetis and i.MX RT]
Thank you for the links to very detailed description of iMX RT 10xx clocks.
Hi Keith Smith,
Thank you for your interest in NXP Semiconductor products and
for the opportunity to serve you.
1) Am I correct?
-- Yes.
2) How is the CPU clock rate set?
-- In the SDK library, it provides a variety of APIs to do that job, in addition, you can use the MCUXpresso Config Tools to do it.
3) If I have firmware running on different clock rate processors, how does the firmware detect the differences and set the CPU clock?
-- In the SDK library, it provides the CLOCK_GetFreq(clock_name_t name) to get the clock frequency for a specific clock.
/*!
* brief Gets the clock frequency for a specific clock name.
*
* This function checks the current clock configurations and then calculates
* the clock frequency for a specific clock name defined in clock_name_t.
*
* param clockName Clock names defined in clock_name_t
* return Clock frequency value in hertz
*/
uint32_t CLOCK_GetFreq(clock_name_t name)
{
uint32_t freq;
switch (name)
{
case kCLOCK_CpuClk:
case kCLOCK_AhbClk:
freq = CLOCK_GetAhbFreq();
break;
case kCLOCK_SemcClk:
freq = CLOCK_GetSemcFreq();
break;
case kCLOCK_IpgClk:
freq = CLOCK_GetIpgFreq();
break;
case kCLOCK_PerClk:
freq = CLOCK_GetPerClkFreq();
break;
case kCLOCK_OscClk:
freq = CLOCK_GetOscFreq();
break;
case kCLOCK_RtcClk:
freq = CLOCK_GetRtcFreq();
break;
case kCLOCK_ArmPllClk:
freq = CLOCK_GetPllFreq(kCLOCK_PllArm);
break;
case kCLOCK_Usb1PllClk:
freq = CLOCK_GetPllFreq(kCLOCK_PllUsb1);
break;
case kCLOCK_Usb1PllPfd0Clk:
freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd0);
break;
case kCLOCK_Usb1PllPfd1Clk:
freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd1);
break;
case kCLOCK_Usb1PllPfd2Clk:
freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd2);
break;
case kCLOCK_Usb1PllPfd3Clk:
freq = CLOCK_GetUsb1PfdFreq(kCLOCK_Pfd3);
break;
case kCLOCK_Usb2PllClk:
freq = CLOCK_GetPllFreq(kCLOCK_PllUsb2);
break;
case kCLOCK_SysPllClk:
freq = CLOCK_GetPllFreq(kCLOCK_PllSys);
break;
case kCLOCK_SysPllPfd0Clk:
freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd0);
break;
case kCLOCK_SysPllPfd1Clk:
freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd1);
break;
case kCLOCK_SysPllPfd2Clk:
freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd2);
break;
case kCLOCK_SysPllPfd3Clk:
freq = CLOCK_GetSysPfdFreq(kCLOCK_Pfd3);
break;
case kCLOCK_EnetPll0Clk:
freq = CLOCK_GetPllFreq(kCLOCK_PllEnet);
break;
case kCLOCK_EnetPll1Clk:
freq = CLOCK_GetPllFreq(kCLOCK_PllEnet25M);
break;
case kCLOCK_AudioPllClk:
freq = CLOCK_GetPllFreq(kCLOCK_PllAudio);
break;
case kCLOCK_VideoPllClk:
freq = CLOCK_GetPllFreq(kCLOCK_PllVideo);
break;
default:
freq = 0U;
break;
}
return freq;
}
Have a great day,
TIC
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Thank you for the SDK reference to CLOCK_GetFreq(). It is in the file fsl_clock.<c,h>.
I have looked at the Mex Config tool to see the clock diagram.
The ARM PLL1 appears to be locked. The ARM_PODF has a list of values from 1 to 8, thus changing the CPU clock rate from 1200/1 to 1200/8. This can be further divided by AHB_PODF from 1 to 8.
The iMX 1064 CPU Clock frequencies available are defined by this chart
To change the frequency to other than 400mHz it appears that the PRE_PERIPH_CLK_SEL has to be changed to PLL2_MAIN_CLK, which results in 528mHz.
I have 2 questions:
1 - What are the combinations of clock settings that provide the other listed frequencies?
2 - Is there a register or SDK function to obtain the specific MCU configuration as shown above?
Hi Keith Smith
Thanks for your reply.
1 - What are the combinations of clock settings that provide the other listed frequencies?
-- In my opinion, the combinations are too many to list, and various combinations can generate the same clock
2 - Is there a register or SDK function to obtain the specific MCU configuration as shown above?
- No, I'm afraid not.
Note: the above-listed frequency means the maximum frequency that the i.MX RT can run-up to.
Have a great day,
TIC
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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