When configuring FLEXRAM in the startup code of RT1061, the CPU cannot be halt.

[TheSix]

I am using MDK for development. Following the official documentation"Using the i.MX RT FlexRAM ", I configured FLEXRAM in the reset function of the startup file. The configuration code is as follows:

In the official documentation, RT1052 is used. However, I am using RT1061. The GPR14 and GPR16 registers in RT1061 do not have the register fields mentioned in the documentation. Therefore, I made some modifications to the code provided in the official documentation.

Now my problem is that after this configuration, FLEXRAM is successfully configured and the program runs normally. However, when I try to flash the program again using JLink, I encounter the following errors:

'***JLink Error: Cannot read register 15 (R15) while CPU is running ***JLink Error: Cannot read register 20 (CFBP) while CPU is running ***JLink Error: CPU is not halted'

In my subsequent tests, I found that if I remove the FLEXRAM configuration code from the startup file, the flashing process proceeds normally without these errors. I've made many changes to the code, but still haven't resolved this issue. What could be the reason for this?

[Omar_Anguiano]

Please refer to this document: Reallocating the FlexRAM - NXP Community

If the mentioned register from the app notes appears as reserved on the RM means that it is a value that the user should not modify so it is not relevant to modify it. 

Best regards,
Omar

[TheSix]

I have read the documentation carefully and configured the FLEXRAM exactly as it says. And the results are the same whether I modify or not the reserved fields.What do i do?please help me, thanks you.