I have a problem with LPSPI (i.MXRT1062). It's about starting the transmission (Master).
Starting PSC + CLOCK begins after ~ 2 us after writing data to registry (LPSPI->TDR = data or TCR.TXMSK = 1). Is this normal behavior?
On the picture: TDR is updated with the falling edge of the yellow signal. Clock starts 2u later.
Hi arni pol,
Thanks for your updated information.
In fact, the test result wave delay time is not very correct, as you know, the gpio toggle also needs time.
About DbgConsole_TryGetchar influence your interrupt, do you try to disable it, any improvement?
Kerry
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Time Tlead (3) I can decrease to few nanoseconds.
The problem is to decrease time between command putting data to SPI and SPI_PCS.
See below on picture1 - the red 1.8us. I don't know why SPI starting sendig data so late.
Picture2 - blue line - PCS
LPSPI_WriteData(EXAMPLE_LPSPI_MASTER_BASEADDR, masterTxData[masterTxCount]);
yellow line -> GPIO_PinWrite(BOARD_INITPINS_CONVST1_GPIO, BOARD_INITPINS_CONVST1_PIN, 1); // yeallow signal
Picture1
Picture2
Hi arni pol,
I can understanding you now.
Please test the following situation, whether you can decrease the time or not:
1. LPSPI_WriteData(EXAMPLE_LPSPI_MASTER_BASEADDR, masterTxData[masterTxCount]);
This code use the register :
LPSPI1->TDR = masterTxData[masterTxCount]);
2. You can set more high module clock:
Any change or not?
This time is determined by the chip and the related core clock and module clock.
Have a great day,
Kerry
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The yellow signal comes from the ADC converter and triggers the interruption. Inside the interruption, the lpspi clock is initialized to receive data for the next int.
I have checked nxp sample. A little changes i've made are: increase clock to 20Mhz and insert the <pin triger>
....
/*Fill up the TX data in FIFO */
while ((LPSPI_GetTxFifoCount(EXAMPLE_LPSPI_MASTER_BASEADDR) < g_masterFifoSize) &&
(masterTxCount - masterRxCount < g_masterFifoSize))
{
/*Write the word to TX register*/
LPSPI_WriteData(EXAMPLE_LPSPI_MASTER_BASEADDR, masterTxData[masterTxCount]);
GPIO_PinWrite(BOARD_INITPINS_CONVST1_GPIO, BOARD_INITPINS_CONVST1_PIN, 1); // yeallow signal
++masterTxCount;
.....
Time between between LPSPI_WriteData and LPSPI_CS is about 1.8 us. Is't possible to decrease it?
Clock start's more late, but this is due to wrong calculatin of delay (in SDK 2.7)
Hi arni pol,
Could you please also add the SPI_CS pin? Do you have more channels in your oscilloscope?
Do you want to decrease the time between the SPI_CS and the CLK ?
Do you want to decrease the item 3 time?
Have a great day,
Kerry
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Hi arni pol,
Please tell me yellow signal is what in your picture ? LPSPI_CS?
Do you test the SDK code, eg:
SDK_2.7.0_EVK-MIMXRT1060\boards\evkmimxrt1060\driver_examples\lpspi
The same wave?
Please tell me your wave signal in your picture at first, then test the SDK code SPI wave, then I can help you to check more details.
Wish it helps you!
If you still have questions about it, please kindly let me know.
Have a great day,
Kerry
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