IMX RT 106x PWM output fixed pulses.

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IMX RT 106x PWM output fixed pulses.

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shingofujiwara
Contributor II

Now I trying to output FlexPWM1 pulses with fixed number.

IOMUXC_GPIO_SD_B0_00_FLEXPWM1_PWMA00

IOMUXC_GPIO_SD_B0_01_FLEXPWM1_PWMB00

 

In SDK, QTMR example has DMA solution.

But,  I can not solve this issue.

 

Is there another process ?

 

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EdwinHz
NXP TechSupport
NXP TechSupport

If I understood correctly, you want the source address to change and sweep through all of the period array, while maintaining the destination address on the same place (the same peripheral address). Is this correct? This can be done by following the implementation described on Section "6.4.4.1 Single Request" of the Reference Manual, but modifying the SLAST register to prevent it from resetting after each major loop transfer. Note that this implementation would have to include a piece of code that makes sure that the source address does not exceed the maximum address of the period array, but that would be the only detail to keep in mind.

I hope this helps,

Edwin.

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EdwinHz
NXP TechSupport
NXP TechSupport

Hi @shingofujiwara,

The RT106x SDK should come with a non dma version of the qtmr implementation for output pwm (qtmr_inputcapture_outputpwm), as well as other implementation of a PWM which would also be helpful for your inquiry. Could you please specify which SDK example code you are basing your application on?

 

BR,

Edwin.

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shingofujiwara
Contributor II

Thanks. @EdwinHz ,

Now I based on "driver_examples\pwm" project.

And combined "driver_examples\qtmr\inputcapture_outputpwm_dma" project.

In qtmr_dma project, DMA transfer period data to compare counter. (2byte width, 2byte length, 1 count)

I want to transfer period to compare register for defined cycles.

I prepared "uint16_t period_array[100]" for DMA transfer to compare register. 

How can I use DMA, transfer incremental memory address to same peripheral address ?

 

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EdwinHz
NXP TechSupport
NXP TechSupport

If I understood correctly, you want the source address to change and sweep through all of the period array, while maintaining the destination address on the same place (the same peripheral address). Is this correct? This can be done by following the implementation described on Section "6.4.4.1 Single Request" of the Reference Manual, but modifying the SLAST register to prevent it from resetting after each major loop transfer. Note that this implementation would have to include a piece of code that makes sure that the source address does not exceed the maximum address of the period array, but that would be the only detail to keep in mind.

I hope this helps,

Edwin.

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shingofujiwara
Contributor II

Thanks @EdwinHz 

So, now I can transfer period value to PWM register.
But, pulse width does not change.

Only set value to VAL register, does not update internal buffer ?
It need to set LDOK register ?

And, DMA does not transfer 0x0000 to VAL register ?
I thought that I can stop PWM (keep High or Low)  by transfer 0x00 to VAL register.

How about this ? 

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shingofujiwara
Contributor II

@EdwinHz 

Sorry, I get mistake my code.
After DMA start, other code initialize DMA.

I can set VAL3 by DMA. and output pulse for requested cycle count.

Thanks for support.

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