I.MX 1060 memory config failure

[torsun]

Hello,

We recently started development on the MIMXRT1060-EVK.

This application is based on the evkmimxrt1060_lwip_udpecho_freertos example project.

After using up most of the available memory in the SRAM_DTC memory region(128KB), we want the software to mainly reside on the SRAM_OC region (768KB). However, as is also the case with an unmodified example lwip project, when putting the OC region above the DTC region and building + flashing, ethernet functionality stops working.

Earlier, we developed on the 1050-EVK, and did not have this issue. Does anyone have a suggestion as to how to resolve this issue? (most likely related to changing the Tx/Rx ethernet buffer pointers?)

In addition, we noted that it is impossible to setup BOARD_SRAM as the 2nd memory region (BOARD_FLASH as 1st region). this applies to all of the example projects in the SDK (2.4.0). Are there any settings on the 1060 that were not on the 1050 regarding on-board memory, or is this an SDK error?

Best regards,

Torstein

EDIT:

Here is the output from the attempted flash when setting BOARD_SDRAM as the 2nd region (tested with the lwip_udpecho_freertos example and hello world):

[AldoG]

Hello 

Could you tell me if you did link the application to RAM?

also, could you please try using a diferent USB hub when connecting the board and see if the issue persist?

I tried linking the application to RAM, SRAM_OC and SRAM_DTC, and had no problem,

Best regards,

Aldo.

[torsun]

Hello Aldo, thank you for your reply.

Linking application to RAM was not the issue. I want to boot from flash, but change the secondary memory region for RAM (operational memory) from SRAM_DTC to SRAM_OC (because DTC has not enough memory for future implementations).

The BOARD_SDRAM problem is not the priority right now, maybe in the future.

This renders the ethernet communication non-functional (as I expect has something to do with the rx and tx buffers)

As an example, if you try to link the "lwip_freertos_udpecho" application to SRAM_OC, can you try and ping the I.MX from your computer over ethernet? do you get a reply on the ping?

I did what you wrote, and linked the application to RAM (SRAM_OC). Same problem.

I have tried many different USB cables, two of which are from the EVAL board package. (along with different USB hubs).

Best regards,

Torstein

[AldoG]

Hello,

Sorry for the delay, Indeed I was able to run the demo without a problem, linked to SRAM_OC and with ethernet working as expected.

Could you please connect your board, open the RT1060-EVK(D:), open the DETAILS file and tell me your interface version, please?

Regards,

Aldo 

[torsun]

Hello, thank you again for your reply.

The interface version is: 0246

Best regards,

Torstein

[AldoG]

Hi,

Sorry for the late response, 

I did a couple of tests to try to replicate your issue so far everything works as expected,

Could you tell me your hardware setups?

SW7 for example, since the imx rt1060 EVK has the QSPI as the default memory, 

Also, your interface version seems ok,

Best regards,

Aldo.

[joandelatorre]

HI.

I read in documentation and also I verify with resistor mounted that the board 1060 has Hypeflash by default and I couldn't program hyperflash because SDK come with QSPI file (MIMXRT1060_SFDP_QSPI.cfx) but not with Hyperflash and also don't work with hyperflash file of 1050.

In RAM work corretly.

Best regards,

Joan De La Torre

[AldoG]

hello,

could you tell me wich documention you read, please?

Please verify if the documentation is for the MIMXRT 1060 EVK, since as stated in the user guide [https://www.nxp.com/docs/en/user-guide/UM11151.PDF]:

BR,

Aldo.

[torsun]

Hello Aldo,

SW7 is set to 0010, and SW5 is set to 0000.

The revision sticker says "SCH-31357 Rev.A2". the sticker below: "700-31357 Rev.A".

on the backside: "TDA6651".

Jumpers are all in their default position:

J1: pins 5-6 connected ,J43:1-2 connected.

J3-J5, J7, J44-J50, J36, J37 mounted.

Could you send me your linker file from the projects, so I can see if there are any differences in how it is configured?

Maybe the problem lies within the software.

Best regards,

Torstein

[AldoG]

Hello,

sorry for the delay, here it is,

evkmimxrt1060_lwip_udpecho_freertos_Debug_memory.ld

MEMORY
{
/* Define each memory region */
BOARD_FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 0x800000 /* 8M bytes (alias Flash) */
SRAM_OC (rwx) : ORIGIN = 0x20200000, LENGTH = 0xc0000 /* 768K bytes (alias RAM) */
BOARD_SDRAM (rwx) : ORIGIN = 0x80000000, LENGTH = 0x2000000 /* 32M bytes (alias RAM2) */
SRAM_DTC (rwx) : ORIGIN = 0x20000000, LENGTH = 0x20000 /* 128K bytes (alias RAM3) */
SRAM_ITC (rwx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias RAM4) */
}

Best regards,
Aldo.