Hi,
I have a board that has some nets incorrectly connected between the processor and the HyperRAM device : The FlexSPI Data A and Data B signal groups are swapped
I have reworked the board for fixing the connections but I think it will not be possible to operate the bus at full speed. I tried doing a test and there were read/write errors
For this prototype, the external memory is required to allocate the LCD frame buffer for the display.
This is a prototype so very high speeds are not important at this stage, but it is necessary to have the external memory operating in order to have the display working.
What's the minimum frequency the HyperRAM device can be operated with the IMXRT1062?
I know that hyperbus memories are very high speed devices, but since the IMXRT1062 is the one controlling the FlexSPI bus, that makes me think that it could be operated at lower frequencies. For instance, could I make it work at 30 MHz instead of 200 MHz? If this is possible I could configure the output buffer strength to low so to avoid signal integrity problems.
Thank you very much in advance,
Best regards,
Patricio