Hi @tbayram ,
Except the memory size difference, any other difference or not?
If just the memory size difference, it is easy to modify it, you just need to change the size in the project memory:
But, if totally the different flash, then you need to modify the DCD, and before you do the DCD modification, I highly recommend you run this SDK demo and do the modification at first:
SDK_2_14_0_MIMXRT1170-EVK\boards\evkmimxrt1170\driver_examples\semc\sdram\cm7
Mainly modify this code:
status_t BOARD_InitSEMC(void)
{
semc_config_t config;
semc_sdram_config_t sdramconfig;
uint32_t clockFrq = EXAMPLE_SEMC_CLK_FREQ;
/* Initializes the MAC configure structure to zero. */
memset(&config, 0, sizeof(semc_config_t));
memset(&sdramconfig, 0, sizeof(semc_sdram_config_t));
/* Initialize SEMC. */
SEMC_GetDefaultConfig(&config);
config.dqsMode = kSEMC_Loopbackdqspad; /* For more accurate timing. */
SEMC_Init(SEMC, &config);
/* Configure SDRAM. */
sdramconfig.csxPinMux = kSEMC_MUXCSX0;
sdramconfig.address = 0x80000000;
sdramconfig.memsize_kbytes = 2 * 32 * 1024; /* 64MB = 2*32*1024*1KBytes*/
sdramconfig.portSize = kSEMC_PortSize32Bit; /*two 16-bit SDRAMs make up 32-bit portsize*/
sdramconfig.burstLen = kSEMC_Sdram_BurstLen8;
sdramconfig.columnAddrBitNum = kSEMC_SdramColunm_9bit;
sdramconfig.casLatency = kSEMC_LatencyThree;
sdramconfig.tPrecharge2Act_Ns = 15; /* tRP 15ns */
sdramconfig.tAct2ReadWrite_Ns = 15; /* tRCD 15ns */
sdramconfig.tRefreshRecovery_Ns = 70; /* Use the maximum of the (Trfc , Txsr). */
sdramconfig.tWriteRecovery_Ns = 10; /* tWR 10ns */
sdramconfig.tCkeOff_Ns =
42; /* The minimum cycle of SDRAM CLK off state. CKE is off in self refresh at a minimum period tRAS.*/
sdramconfig.tAct2Prechage_Ns = 40; /* tRAS 40ns */
sdramconfig.tSelfRefRecovery_Ns = 70;
sdramconfig.tRefresh2Refresh_Ns = 60;
sdramconfig.tAct2Act_Ns = 10; /* tRC/tRDD 10ns */
sdramconfig.tPrescalePeriod_Ns = 160 * (1000000000 / clockFrq);
sdramconfig.refreshPeriod_nsPerRow = 64 * 1000000 / 8192; /* 64ms/8192 */
sdramconfig.refreshUrgThreshold = sdramconfig.refreshPeriod_nsPerRow;
sdramconfig.refreshBurstLen = 1;
sdramconfig.delayChain = 6; /* For all tempeatures. */
sdramconfig.autofreshTimes = 8; /* An additional eight Auto Refresh cycles (CBR) are also required before or after
programming the Mode Register to ensure proper subsequent operation. */
return SEMC_ConfigureSDRAM(SEMC, kSEMC_SDRAM_CS0, &sdramconfig, clockFrq);
}memsize_kbytes=> to your real used memory side:
sdramconfig.tPrecharge2Act_Ns = 15; /* tRP 15ns */
sdramconfig.tAct2ReadWrite_Ns = 15; /* tRCD 15ns */
sdramconfig.tRefreshRecovery_Ns = 70; /* Use the maximum of the (Trfc , Txsr). */
sdramconfig.tWriteRecovery_Ns = 10; /* tWR 10ns */
sdramconfig.tCkeOff_Ns =
42; /* The minimum cycle of SDRAM CLK off state. CKE is off in self refresh at a minimum period tRAS.*/
sdramconfig.tAct2Prechage_Ns = 40; /* tRAS 40ns */
sdramconfig.tSelfRefRecovery_Ns = 70;
sdramconfig.tRefresh2Refresh_Ns = 60;
sdramconfig.tAct2Act_Ns = 10; /* tRC/tRDD 10ns */
sdramconfig.tPrescalePeriod_Ns = 160 * (1000000000 / clockFrq);
sdramconfig.refreshPeriod_nsPerRow = 64 * 1000000 / 8192; /* 64ms/8192 */
The above parameter, you need to refer to your used SDRAM datasheet to modify it.
Then do the testing, make sure all the SDRAM data write and read is correct.
After this works, then you can modify the dcd.c:
Mainly fill the SDRAMCRn register to the data which you tested in the above semc_cm7 demo.
You can try it on your side.
If you still have a question about it, please kindly let me know.
Wish it helps you!
Best Regards,
Kerry
