mipi csi 2

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mipi csi 2

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e34605
Contributor I

csi1_bridge: csi1_bridge@30b80000 {
compatible = "fsl,imx8mq-csi", "fsl,imx6s-csi";
reg = <0x0 0x30b80000 0x0 0x10000>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_CSI1_ROOT>,
<&clk IMX8MQ_CLK_DUMMY>;
clock-names = "disp-axi", "csi_mclk", "disp_dcic";
dma-coherent;
status = "disabled";
};

csi2_bridge: csi2_bridge@30a90000 {
compatible = "fsl,imx8mq-csi", "fsl,imx6s-csi";
reg = <0x0 0x30a90000 0x0 0x10000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_CSI2_ROOT>,
<&clk IMX8MQ_CLK_DUMMY>;
clock-names = "disp-axi", "csi_mclk", "disp_dcic";
dma-coherent;
status = "disabled";
};

mipi_csi_1: mipi_csi1@30b60000 {
compatible = "fsl,mxc-mipi-csi2_yav";
reg = <0x0 0x30b60000 0x0 0x1000>; /* MIPI CSI1 Controller base addr */
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_CSI1_CORE>,
<&clk IMX8MQ_CLK_CSI1_ESC>,
<&clk IMX8MQ_CLK_CSI1_PHY_REF>;
clock-names = "clk_apb", "clk_core", "clk_esc", "clk_pxl";
assigned-clocks = <&clk IMX8MQ_CLK_CSI1_CORE>,
<&clk IMX8MQ_CLK_CSI1_PHY_REF>,
<&clk IMX8MQ_CLK_CSI1_ESC>;
assigned-clock-rates = <266000000>, <333000000>, <66000000>;
power-domains = <&mipi_csi1_pd>;
csis-phy-reset = <&src 0x4c 7>;
phy-gpr = <&gpr 0x88>;
status = "disabled";
};

mipi_csi_2: mipi_csi2@30a70000 {
compatible = "fsl,mxc-mipi-csi2_yav";
reg = <0x0 0x30a70000 0x0 0x1000>; /* MIPI CSI2 Controller base addr */
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_CSI2_CORE>,
<&clk IMX8MQ_CLK_CSI2_ESC>,
<&clk IMX8MQ_CLK_CSI2_PHY_REF>;
clock-names = "clk_apb", "clk_core", "clk_esc", "clk_pxl";
assigned-clocks = <&clk IMX8MQ_CLK_CSI2_CORE>,
<&clk IMX8MQ_CLK_CSI2_PHY_REF>,
<&clk IMX8MQ_CLK_CSI2_ESC>;
assigned-clock-rates = <266000000>, <333000000>, <66000000>;
power-domains = <&mipi_csi2_pd>;
csis-phy-reset = <&src 0x50 7>;
phy-gpr = <&gpr 0xa4>;
status = "disabled";
};
I am trying to read the mipi data off a camera I have attached to a coral SOM. I can read all of the registers on the camera but I cannot read the frame data. The camera is connected to mipi csi 2. I am wondering what I am doing wrong. I have swapped the mipi_csi_1 and 2 registers and that also does not seem to work. Any help on how to read the frame data would be much appreciated. Thank you

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joanxie
NXP TechSupport
NXP TechSupport

your information is too limited,did you use nxp board or your customized board? if you use your own board,  firstly could you confirm if your HW connection is correct or not? do you get any correct clock? if yes, pls send your logfile with me

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