mem mode is not working properly.

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mem mode is not working properly.

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bandarulavanya
Contributor V

Hi All,

I am working on power handling in custom board similar to the imx6qdl-sabresd.

details: yacto setup, 3.14.28 kernel version, pfuze100.

When i use "echo standby > /sys/power/state " it is resuming properly. (accelerometer, uart interrupts i used).

But when i am using  "echo mem > /sys/power/state " it is rebooting if i am giving interrupt.

And i observed that  accelerometer interrupt is working when i install wifi modules.

If i install wifi modules and if i am using "mem" mode it is rebooting after some time.

if i am not installing wifi modules it's hanging if i give "mem".

I want it should resume instead of reboot when  accelerometer or uart interrupt occurs.

But in older kernel version-3.0.35 it's working fine.

From thread i.MX6DL LPDDR2 Support for L3.0.35_4.0.0  there is patches for suspend mode or low power mode to work properly.

Is there any patches like this for kernel version 3.14.28. my issue is similar to this https://community.nxp.com/message/861327  thread.

Thanks & Regards,

Lavanya

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bandarulavanya
Contributor V

Hi,

We can change the VDDCORE SW1AB from PMIC are increasing in DSM mode from 1.16 to 1.36 instead of reducing to 0.9V by writing the Related value in to the PMIC driver probe function in STBY registers of PMIC.

Thanks,

Lavanya

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1,714 Views
bandarulavanya
Contributor V

Hi All,

I observed that VDDCORE SW1AB from PMIC are increasing in DSM mode from 1.16 to 1.36 instead of reducing to 0.9V.

my requirement is this should reduce when device enter in to DSM(Deep Sleep Mode).

Thanks

Lavanya

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bandarulavanya
Contributor V

Hi,

We can change the VDDCORE SW1AB from PMIC are increasing in DSM mode from 1.16 to 1.36 instead of reducing to 0.9V by writing the Related value in to the PMIC driver probe function in STBY registers of PMIC.

Thanks,

Lavanya

1,714 Views
Yuri
NXP Employee
NXP Employee

Hello,

  The mem mode ("echo mem > /sys/power/state ") relates to the  DORMANT mode.

Please check Your DTB - If there is "fsl,enable-lpsr" defined in DTB ocrams node, mem is
mapped to LPSR mode and all the blocks in the system are put into power off state.
Total system POR is needed in such case.

   Also, please verify LPDDR2 initialization, using the recent Aid tool.

https://community.nxp.com/docs/DOC-105965 

Have a great day,
Yuri

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bandarulavanya
Contributor V

Hi Yuri Muhin,

 

I have solved the reboot issue with ldo_bypass_enable=<1>; in dts file. Previous case it is ldo_bypass_enable=<0>;.

 

Now after changing to ldo_bypass_enable=<1> it's resuming properly, But my VDDCORE(VDDARM_IN) is still 1.36V it should reduce to 0.9V.

where i need to change this one.

 

Thanks

Lavanya

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bandarulavanya
Contributor V

Hi All,


root@imx6_fs_wcam:~# echo mem > /sys/power/state
PM: Syncing filesystems ... done.
Freezing user space processes ... (elapsed 0.068 seconds) done.
Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
Suspending console(s) (use no_console_suspend to debug)


U-Boot 2014.04 (Jun 06 2017 - 17:36:38)

CPU:   Freescale i.MX6SOLO rev1.2 at 792 MHz
CPU:   Temperature 33 C, calibration data: 0x57a4dc69
Reset cause: POR
Board: FS-WCAM
I2C:   ready
DRAM:  512 MiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
No panel detected: default to Hannstar-XGA
Display: Hannstar-XGA (1024x768)
In:    serial
Out:   serial
Err:   serial

Reset cause is POR i am getting, how i can debug this issue.

Thanks

Lavanya

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bandarulavanya
Contributor V

Hi All,

I observed that

"VDDARM_IN and VDDSOC_IN are not dropping to
0.9V when asserting the PMIC_STBY_REQ" But PMIC_STBY_REQ assertion and de assertion
is  happening when "echo mem > /sys/power/state ".
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