Hi,
I have a custom board based on iMX8MP evk, which is using lt-5.10.y.
For sound-wm8960 configuration using sai3, but the sai1_mclk, sai2_mclk, sai3_mclk, sai5_mclk, sai6_mclk, sai7_mclk are not initialised during boot. Which is evident from the boot log
[ 0.201181] i.MX clk 324: register failed with -2
[ 0.201193] i.MX clk 325: register failed with -2
[ 0.201198] i.MX clk 326: register failed with -2
[ 0.201203] i.MX clk 328: register failed with -2
[ 0.201207] i.MX clk 329: register failed with -2
[ 0.201216] i.MX clk 330: register failed with -2
What is the possible reason this issue occurs, the same dts was used in lt-5.4-y
I have even built the imx8mp-evk image and seen the same errors there too.
Also there are other error msgs that follow after the above log as below:
[ 1.301886] imx-lcdifv3 32e80000.lcd-controller: No pix clock get: -517
[ 1.309244] imx-lcdifv3 32e90000.lcd-controller: No pix clock get: -517
[ 1.316171] imx-lcdifv3 32fc6000.lcd-controller: No irq get, ret=-517
[ 1.327189] imx-hdmi-pavi 32fc4000.hdmi-pai-pvi: No pvi clock get
[ 2.031615] fsl-sai 30c20000.sai: failed to get bus clock: -517
[ 2.039608] fsl-sai 30c30000.sai: failed to get bus clock: -517
[ 2.048815] fsl-micfil-dai 30ca0000.micfil: failed to get core clock: -517
[ 2.056547] fsl-easrc 30c90000.easrc: failed to get mem clock
[ 2.062846] fsl,imx8mp-audio-xcvr 30cc0000.xcvr: failed to get ipg clock
[ 2.070287] fsl-aud2htx 30cb0000.aud2htx: failed to get mem clock
[ 2.077648] imx-xcvr sound-xcvr: snd_soc_register_card failed: -517
[ 2.085047] imx-micfil sound-micfil: snd_soc_register_card failed (-517)
[ 2.092442] imx-cdnhdmi sound-hdmi: snd_soc_register_card failed (-517)
I have attached the full boot log. Any inputs related to fixing the clock issues will be helpful.
sai3 dts node:
&sai3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>;
clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_IPG>, <&clk IMX8MP_CLK_DUMMY>,
<&audio_blk_ctrl IMX8MP_CLK_AUDIO_BLK_CTRL_SAI3_MCLK1>, <&clk IMX8MP_CLK_DUMMY>,
<&clk IMX8MP_CLK_DUMMY>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
assigned-clock-rates = <12288000>;
fsl,sai-mclk-direction-output;
status = "okay";
};
clk node in dts:
&clk {
init-on-array = <IMX8MP_CLK_HSIO_ROOT>;
}
