imx8mm GPIO interrupt handling in m4 while Linux sleeps

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

imx8mm GPIO interrupt handling in m4 while Linux sleeps

269 Views
mobrembski
Contributor I

Hello!

 

In our project we're using iMX8 Mini SoC, which is battery powered, and we're thinking about reducing sleep power usage. So far our SoC is being wake-up by M4 core, when readings from one of our sensors on board exceed threshold.

Now so far our M4 software is using pooling mode to read sensor data, which means M4 is always running. We came with idea to reduce M4 power usage by getting M4 to sleep and waking up M4 by GPIO line when sensor has new data triggers interrupt line.

But here's the problem. Our GPIO line is in GPIO1 bank, which is also used by Linux. So far, as we know, it's not possible to share interrupt lines between Linux and M4 (Is it?) But what about situation when Linux is sleeping?

We've did an experiment - we use pooling mode while linux is awake, and when it is preparing for sleep (we know that as we receive rpmsg about that) we're setting up GPIO line to have interrupt handler by M4 and we enable interrupts.
And here's something weird happen. Our M4 is running, but interrupt handler is being called few times and it's while Linux is preparing for sleep. After linux finally sleeps, no more interrupts being fired. 


We suppose that this situation is something related with Linux GPIO preparation before it goes to sleep. Maybe some iMX driver re-setup GPIO registers?

We don't know, but if you could give me some clue where to start looking? Is it even possible at all to change ownership of interrupt handler?

Does the GPIOs being re-configured while preparing to sleep? If it is, by which module?

Thank you!

Labels (2)
0 Kudos
Reply
2 Replies

226 Views
Alejandro_Salas
NXP TechSupport
NXP TechSupport

Hello @mobrembski 

 

Looking at that scenario it appears to be possible, please take a look to the chapter 4.5 Peripheral control in Cortex-M of AN13400 i.MX 8M Low Power Design By M Core Running In System Suspend.

Basically there are two ways to manage shared peripherals:

• The use of RPMsg.
• The use of practical drivers and time-division access.

 

For your propuse maybe it is better to look the drivers and time-division. chapter 4.5.2.2 The use of practical drivers and time-division access on both cores.

 

I hope this information can helps to you.

 

Best regards,

--... ...--

Salas.

0 Kudos
Reply

215 Views
mobrembski
Contributor I

Indeed, it could help, thanks!

 

However i had another question which is related.

I had GPIO1 bank used in linux devicetree. If so, can i use interrupt on one of it's line in GPIO1 bank via M4?

I think i cant, but just wanted to be sure.
If i cant, i suppose all my GPIO1 bank has to be managed by M4 and passed over RPMSG to Linux?

 

0 Kudos
Reply