Hi,
I feel that the iMX7 reference manual EIM configuration needs more information to be clearly understood.
I am using the EIM interface in fixed latency synchronous configuration for both read and write operations. The EIM is configured for multiplexed 16 bit word size with address shift according to 16 bit word size.
At this time I am specifically trying to understand the impact of the EIM_CSnGCR1.PSZ, EIM_CSnGCR1.BL and EIM_CSnGCR1.WC settings.
When I set the PSZ to 16 words. ( WC 1 and BL 0b100 continuous burst length), and perform a read access of 272 words on EIM CS0 bus, some times I see that the CS remains asserted to read 16 words at a time for 17 times. In this case some of the data that is being read seems to be missing or shifted a few words.
Other times with the same settings and same 272 word read from same address, I see CS asserted for 8 words at a time for 34 times, in this case the data read is mostly ok.
When I change the PSZ setting to 8 words, and perform the same test, the CS always asserts for 8 words, 34 times but the data read again has errors.
I wish there was more information on how does changing the PSZ signal have on the EIM control signals CS, LBA, OE, Address and Data.
The description of Burst Length and Write Continuous adds more confusion.
