imx6q 下使用TW2835视频采集芯片的问题

[xexerse]

请问，基于IMX6Q改的板子，采集芯片使用的TW2835，linux 3.0.35，use CSI0。
在board-mx6q_sabresd.c中添加如下代码：

//mclk 感觉没什么用啊
static struct fsl_mxc_camera_platform_data tw2835_data = {
        .core_regulator    = NULL,
        .io_regulator    = NULL,
        .analog_regulator    = NULL,
        .gpo_regulator    = NULL,
        .mclk = 27000000,
        .mclk_source = 0,
        .csi = 0,
        .io_init = mx6q_csi0_io_init,
        .pwdn = mx6q_csi0_cam_powerdown,
};

//use CSI0
static struct fsl_mxc_capture_platform_data capture_data[] = {
    {
        .csi = 0,
        .ipu = 0,
        .mclk_source = 0,
        .is_mipi = 0,
    }, {
        .csi = 1,
        .ipu = 0,
        .mclk_source = 0,
        .is_mipi = 1,
    },
};

//I2C slave address is 0x42
static struct i2c_board_info mxc_i2c1_board_info[] __initdata = {
               ...
        {
                I2C_BOARD_INFO("tw2835", 0x42),/*I2C_BOARD_INFO("tw2835", 0x42)*/
                .platform_data = (void *)&tw2835_data,
        },
             ...
}

在board-mx6q_sabresd.h中修改如下代码：
static iomux_v3_cfg_t mx6q_sabresd_csi0_sensor_pads[] = {
    /* IPU1 Camera */
    MX6Q_PAD_CSI0_DAT12__IPU1_CSI0_D_12,
    MX6Q_PAD_CSI0_DAT13__IPU1_CSI0_D_13,
    MX6Q_PAD_CSI0_DAT14__IPU1_CSI0_D_14,
    MX6Q_PAD_CSI0_DAT15__IPU1_CSI0_D_15,
    MX6Q_PAD_CSI0_DAT16__IPU1_CSI0_D_16,
    MX6Q_PAD_CSI0_DAT17__IPU1_CSI0_D_17,
    MX6Q_PAD_CSI0_DAT18__IPU1_CSI0_D_18,
    MX6Q_PAD_CSI0_DAT19__IPU1_CSI0_D_19,
//    MX6Q_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN,
    MX6Q_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC,
    MX6Q_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK,
    MX6Q_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC,

    MX6Q_PAD_GPIO_0__CCM_CLKO,        /* camera clk */

//    MX6Q_PAD_SD1_DAT0__GPIO_1_16,        /* camera PWDN */
//    MX6Q_PAD_SD1_DAT1__GPIO_1_17,        /* camera RESET */
};

TW2835的源码是参考的网上的一个单片机源码改编的，源码见附件。
我现在的问题是当我使用V4L2采集视频的时候，报的错误是：
ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0
这个错误是因为mxc_v4l2_capture中的camera_callback没有调用么，这个错误应该怎么查呢？
V4L2 LOG：
On Open: Input to ipu size is 720 x 625
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl 80685600
   case VIDIOC_QUERYCAP
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c02c5651
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0045627
   case VIDIOC_S_INPUT
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl 80085617
   case VIDIOC_G_STD
In mxc_v4l2_g_std
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl 40085618
   case VIDIOC_S_STD
In mxc_v4l2_s_std ff
   Setting standard to PAL ff
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c02c563a
   case VIDIOC_CROPCAP
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0cc5616
   case VIDIOC_S_PARM
In mxc_v4l2_s_param
   Current capabilities are 0
   Current capturemode is 0  change to 0
   Current framerate is 25  change to 0
   clock_curr=mclk=0
   g_fmt_cap returns widthxheight of input as 720 x 625
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0cc5605
   case VIDIOC_S_FMT
In MVC: mxc_v4l2_s_fmt
   type=V4L2_BUF_TYPE_VIDEO_CAPTURE
End of mxc_v4l2_s_fmt: v2f pix widthxheight 720 x 576
End of mxc_v4l2_s_fmt: crop_bounds widthxheight 720 x 625
End of mxc_v4l2_s_fmt: crop_defrect widthxheight 720 x 625
End of mxc_v4l2_s_fmt: crop_current widthxheight 720 x 576
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0cc5604
   case VIDIOC_G_FMT
In MVC: mxc_v4l2_g_fmt type=1
   type is V4L2_BUF_TYPE_VIDEO_CAPTURE
End of mxc_v4l2_g_fmt: v2f pix widthxheight 720 x 576
End of mxc_v4l2_g_fmt: crop_bounds widthxheight 720 x 625
End of mxc_v4l2_g_fmt: crop_defrect widthxheight 720 x 625
End of mxc_v4l2_g_fmt: crop_current widthxheight 720 x 576
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0145608
   case VIDIOC_REQBUFS
In MVC:mxc_streamoff
MVC: In mxc_free_frame_buf
In MVC:mxc_allocate_frame_buf - size=829440
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0445609
   case VIDIOC_QUERYBUF
In MVC:mxc_v4l2_buffer_status
In MVC:mxc_mmap
   pgoff=0x18a00, start=0x3387f000, end=0x3394a000
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0445609
   case VIDIOC_QUERYBUF
In MVC:mxc_v4l2_buffer_status
In MVC:mxc_mmap
   pgoff=0x18300, start=0x33980000, end=0x33a4b000
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0445609
   case VIDIOC_QUERYBUF
In MVC:mxc_v4l2_buffer_status
In MVC:mxc_mmap
   pgoff=0x18b00, start=0x33b27000, end=0x33bf2000
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c044560f
   case VIDIOC_QBUF
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c044560f
   case VIDIOC_QBUF
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c044560f
   case VIDIOC_QBUF
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl 40085618
   case VIDIOC_S_STD
In mxc_v4l2_s_std ff
   Setting standard to PAL ff
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl 40045612
   case VIDIOC_STREAMON
In MVC:mxc_streamon
In MVC:mxc_v4l_ioctl
In MVC: mxc_v4l_do_ioctl c0445611
   case VIDIOC_DQBUF
In MVC:mxc_v4l_dqueue
ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0
VIDIOC_DQBUF failed.In MVC:mxc_v4l_ioctl

In MVC: mxc_v4l_do_ioctl 40045613
   case VIDIOC_STREAMOFF
In MVC:mxc_streamoff
In MVC:mxc_free_frames
In MVC:mxc_v4l_close
In MVC:mxc_streamoff
mxc_v4l_close: release resource
MVC: In mxc_free_frame_buf
In MVC:mxc_free_frames

TW2835 register value:
root@freescale /opt$ ./i2cshow 0  //PAGE 0
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00: 00 08 20 d0 05 20 28 80 80 80 80 82 06 00 11 00
10: 00 08 20 d0 05 20 28 80 80 80 80 82 46 00 11 00
20: 00 08 20 d0 05 20 28 80 80 80 80 82 86 00 11 00
30: 00 08 20 d0 05 20 28 80 80 80 80 82 c6 00 11 00
40: 00 77 77 45 a0 22 2f 64 80 80 82 82 00 0f 05 00
50: 00 80 06 00 40 0f 00 00 00 00 00 00 00 00 00 00
60: 88 88 00 00 10 32 54 76 98 ba dc fe 00 00 88 88
70: 88 54 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 01 7f ff 7f ff 00 ff ff ff ff 31 00 d0 00 20 28
90: 41 7f ff 7f ff 00 ff ff ff ff 71 00 d0 00 20 28
a0: 81 7f ff 7f ff 00 ff ff ff ff b1 00 d0 00 20 28
b0: c1 7f ff 7f ff 00 ff ff ff ff f1 00 d0 00 20 28
c0: 00 00 00 f7 ff 00 f0 ff 00 3c 4f 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 28 00
root@freescale /opt$ ./i2cshow 1  //PAGE 1
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00: 80 02 00 00 0f 84 00 00 00 00 20 d7 23 2d 1e a7
10: 80 02 00 00 02 00 10 00 81 02 00 01 02 00 11 00
20: 82 02 00 02 02 00 12 00 83 02 00 03 02 00 13 00
30: 00 5a 00 48 5a b4 00 48 00 5a 48 90 5a b4 48 90
40: 78 b4 30 60 00 3c 60 90 3c 78 60 90 78 b4 60 90
50: 28 00 10 a0 0f 00 40 03 00 00 00 00 00 00 20 a7
60: 80 02 00 81 02 00 82 02 00 83 02 00 00 e4 00 00
70: 00 03 00 01 23 00 02 00 0f 0f 0f 0f f0 00 8b 04
80: df 00 91 07 eb 10 a8 00 80 c7 80 00 c0 c1 c2 c3
90: 00 00 00 00 00 00 00 00 ff ff 00 00 00 00 00 00
a0: 66 32 97 00 80 20 00 0c 20 4c aa 70 40 40 00 00
b0: 00 00 eb 00 ff 00 ff 0f 0f 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
root@freescale /opt$ ./i2cshow 2  //PAGE 2
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00: 00 00 00 00 00 50 59 00 35 03 60 e1 00 94 0d 0f
10: f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 b0 00 00 00 00 40 00 00 00 00 00 00 b0 00 00
30: 00 00 40 00 00 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 40 40 40 42 ff
60: 00 00 00 00 00 00 fb 00 00 00 00 00 00 00 fb 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 17 73 88 4a 07 24 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0f 00
a0: 17 73 88 4a 07 24 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0f 00
c0: 17 73 88 4a 07 24 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0f 00
e0: 17 73 88 4a 07 24 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0f 00

请各位大神帮帮忙，我的问题出在哪里啊？是TW2835的寄存器设置有问题还是ARM这边的IPU CSI配置有问题？

Original Attachment has been moved to: tw2835.h.zip

Original Attachment has been moved to: tw2835.c.zip

[jimmychan]

Do you set the GPIO pins for the PWDN and RESET?

[xexerse]

Thanks for regard.

Here is my code for PWDN and RESET

static void mx6q_csi0_cam_powerdown(int powerdown)
{
    if (powerdown)
        gpio_set_value(SABRESD_CSI0_PWN, 1);
    else
        gpio_set_value(SABRESD_CSI0_PWN, 0);

    msleep(2);
}

static void mx6q_csi0_io_init(void)
{
    if (cpu_is_mx6q())
        mxc_iomux_v3_setup_multiple_pads(mx6q_sabresd_csi0_sensor_pads,
            ARRAY_SIZE(mx6q_sabresd_csi0_sensor_pads));
    else if (cpu_is_mx6dl())
        mxc_iomux_v3_setup_multiple_pads(mx6dl_sabresd_csi0_sensor_pads,
            ARRAY_SIZE(mx6dl_sabresd_csi0_sensor_pads));

    /* Camera reset */
//    gpio_request(SABRESD_CSI0_RST, "cam-reset");
//    gpio_direction_output(SABRESD_CSI0_RST, 1);

    /* Camera power down */
    gpio_request(SABRESD_CSI0_PWN, "cam-pwdn");
    gpio_direction_output(SABRESD_CSI0_PWN, 1);
    msleep(5);
    gpio_set_value(SABRESD_CSI0_PWN, 0);
    msleep(5);
//    gpio_set_value(SABRESD_CSI0_RST, 0);
//    msleep(1);
//    gpio_set_value(SABRESD_CSI0_RST, 1);
    msleep(5);
    gpio_set_value(SABRESD_CSI0_PWN, 1);

    /* For MX6Q:
     * GPR1 bit19 and bit20 meaning:
     * Bit19:       0 - Enable mipi to IPU1 CSI0
     *                      virtual channel is fixed to 0
     *              1 - Enable parallel interface to IPU1 CSI0
     * Bit20:       0 - Enable mipi to IPU2 CSI1
     *                      virtual channel is fixed to 3
     *              1 - Enable parallel interface to IPU2 CSI1
     * IPU1 CSI1 directly connect to mipi csi2,
     *      virtual channel is fixed to 1
     * IPU2 CSI0 directly connect to mipi csi2,
     *      virtual channel is fixed to 2
     *
     * For MX6DL:
     * GPR13 bit 0-2 IPU_CSI0_MUX
     *   000 MIPI_CSI0
     *   100 IPU CSI0
     */
    if (cpu_is_mx6q())
        mxc_iomux_set_gpr_register(1, 19, 1, 1);
    else if (cpu_is_mx6dl())
        mxc_iomux_set_gpr_register(13, 0, 3, 4);
}

I used oscilloscope to detect the signals of hardware:
1)the CLKVDOX pin outputs 27M waveform
2)the HSYNC, VSYNC output always high
3) CSI0_DAT12~CSI0_DAT19 always high

Am i missing something? why the HSYNC, VSYNC, VDOX0~VDOX7 always being high?

[jimmychan]

In your code, you didn't set the reset pin. how do you set the reset pin RSTB?

For your reference :

http://home.eeworld.com.cn/my/space-uid-342393-blogid-55004.html 

[xexerse]

Thanks for regards!

I use a circuit to reset when power on.

I check my circuit diagram and I have another question.

What is the function of C310 capacitor？ Is this led to the problem?