imx6dl sending cmd1 to emmc not getting any response

[swapniltiwari]

in our custom based board we are using MT29PZZZ8D5BKFTF-18 W.95L(8gb emmc)4.51

when i am sending cmd0 then cmd1 to my emmc using jtag and i am not getting any response

for cmd1 i am probing cmd line which shows command trigger but no response after 56cycles also

i checked clock and power all seems good.what could be the reason of this kind of behaviour.

regards

swapnil

[igorpadykov]

Hi swapnil

usually such behaviour is caused by hardware: broken lines or missing

power, suggest to check emmc signals with oscilloscope.

Best regards

igor

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[swapniltiwari]

Hi igor,

power lines,clocks and cmd line are all proper showing using osciiloscope

any other reason that i could look into?any basic steps specific to imx6dl

regards

swapnil

[igorpadykov]

Hi swapnil

one can try basic usdhc test in attached example from sdk.

Best regards

igor

[swapniltiwari]

Hi igor,

i am using trace32 and cmm file in card identification mode but not getting

response from cmd1. Can you pls check my cmm file configuration

; --------------------------------------------------------------------------------

; @Title: i.MX6 eMMC FLASH Programming Script

; @Description:

;   FLASH Type: eMMC FLASH(Numonyx, NAND16GAH0P) connected SDHC3

;

;   S(D)RAM: 0x900000

;   SDHC CS3 base: 0x2198000

;

; @Author: jjeong

; @Chip: IMX6SOLO

; @Keywords: MACRONIX MX25L25635F

; @Copyright: (C) 1989-2014 Lauterbach GmbH, licensed for use with TRACE32(R) only

; --------------------------------------------------------------------------------

; $Id: imx6solo-emmc.cmm 2881 2014-07-07 10:35:48Z kjmal $

&MMC_BASE=0x2198000

  RESet

  SYStem.CPU iMX6Solo  ;SOLO

  ;CORE.ASSIGN 1        ;SOLO

  SYStem.Option ResBreak OFF

  SYStem.Option WaitReset 1.3s

  Trace.METHOD Onchip

  SYStem.Up

  Data.Set C15:0x1 %Long  (Data.Long(C15:0x1)&~(0x10005))  ; disable interrupt and mmu

  Data.Set ASD:0x020d8000 %Long 0x01C00521  ;SRC Control Register

; --------------------------------------------------------------------------------

; Disable WDOG

; --------------------------------------------------------------------------------

Data.Set 0x020bc000 %Word 0x30

; --------------------------------------------------------------------------------

; Enable all clocks (they are disabled by ROM code)

; --------------------------------------------------------------------------------

Data.Set 0x020c4068 %Long 0xffffffff

Data.Set 0x020c406c %Long 0xffffffff

Data.Set 0x020c4070 %Long 0xffffffff

Data.Set 0x020c4074 %Long 0xffffffff

Data.Set 0x020c4078 %Long 0xffffffff

Data.Set 0x020c407c %Long 0xffffffff

Data.Set 0x020c4080 %Long 0xffffffff

Data.Set 0x020c4084 %Long 0xffffffff

; --------------------------------------------------------------------------------

; IO Mux for SDHC3

; --------------------------------------------------------------------------------

Data.Set 0x020E030C %LE %Long 0x0  ;IOMUXC_SW_MUX_CTL_PAD_SD3_CLK

Data.Set 0x020E0310 %LE %Long 0x0  ;IOMUXC_SW_MUX_CTL_PAD_SD3_CMD

Data.Set 0x020E0314 %LE %Long 0x0  ;IOMUXC_SW_MUX_CTL_PAD_SD3_DAT0

Data.Set 0x020E06F4 %LE %Long 0x0001B0B0  ;IOMUXC_SW_PAD_CTL_PAD_SD3_CLK

Data.Set 0x020E06F8 %LE %Long 0x0001B0B0  ;IOMUXC_SW_PAD_CTL_PAD_SD3_CMD

Data.Set 0x020E06FC %LE %Long 0x0001B0B0  ;IOMUXC_SW_PAD_CTL_PAD_SD3_DAT0

; --------------------------------------------------------------------------------

; Config SDHC

; --------------------------------------------------------------------------------

Data.Set &MMC_BASE+0x04 %LE %Long 0x00010200  ; blk size,cnt

Data.Set &MMC_BASE+0x28 %LE %Long 0x08800020  ; bus width, endian

Data.Set &MMC_BASE+0x2C %LE %Long 0x008E1088  ; 400KHz clk

//FLASH READ ID TEST

AREA.CLEAR

AREA.view

GOSUB READ_ID_TEST

DIALOG.YESNO "the flash id is correct on AREA window?"

ENTRY &result

IF !&result

(

PRINT "pls, check your register configuration to enable your flash controller"

ENDDO

)

//S(D)RAM TEST for algorithm file

;GOSUB SDRAM_INIT

Data.Test 0x900000++0x3FFF  /Prime ;s(d)ram test

IF FOUND()

(

PRINT "s(d)ram is NOT initialized around 0x" ADDRESS.OFFSET(TRACK.ADDRESS())

ENDDO

)

programFlash:

FLASHFILE.RESet

;FLASHFILE.CONFIG  <eMMC controller> <#partition>  <0x0>

FLASHFILE.CONFIG  &MMC_BASE         0x0

;FLASHFILE.TARGET <<code range>> <<data range>> <<algorithm file>>

  FLASHFILE.TARGET  0x900000++0x1fff   0x904000++0x1fff   ~~/demo/arm/flash/byte/emmc_imx6.bin  /KEEP

  FLASHFILE.GETID

  Data.Set &MMC_BASE+0x2C %LE %Long 0x008E0188  ; 25Mhz clk, only allowed the data access commands on the higher clk

//Read FLASH Manufacture and Device ID

  FLASHFILE.DUMP 0x0               ; Read 

;FLASHFILE.ERASE 0x0--0xFFFFF     ; Erase

;FLASHFILE.LOAD * 0x0             ; Write

ENDDO

READ_ID_TEST:

//CMD0

RePeaT 2.

(

Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status

Data.Set &MMC_BASE+0x8 %Long 0x0  ;arg

Data.Set &MMC_BASE+0xc %Long 0x0  ;cmd

WAIT 10.ms

)

//CMD1

RePeaT 10.

(

Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status

Data.Set &MMC_BASE+0x8 %Long 0x40FF8000 ;arg

Data.Set &MMC_BASE+0xc %Long 0x01020000 ;cmd1

&resp=Data.Long(A:(&MMC_BASE+0x10))

//print "CMD1 resp: 0x" &resp

IF (&resp&0x80000000)==0x80000000

(

GOTO jump_cmd2

)

)

PRINT "CMD1 fail"

END

jump_cmd2:

//CMD2

Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status

Data.Set &MMC_BASE+0x8 %Long 0x0     ;arg

Data.Set &MMC_BASE+0xc %Long 0x02010000 ;cmd2

WAIT 10.ms

//CMD3

Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status

Data.Set &MMC_BASE+0x8 %Long 0x00010000  ; arg, MMC RCA is (0x0001<<16.)

Data.Set &MMC_BASE+0xc %Long 0x03020000  ;cmd3

WAIT 10.ms

//CMD10

Data.Set &MMC_BASE+0x30 %Long 0xFFFFFFFF ;clear status

Data.Set &MMC_BASE+0x8 %Long 0x00010000 ; arg, MMC RCA is (0x0001<<16.)

Data.Set &MMC_BASE+0xc %Long 0x0A010000  ;cmd10

WAIT 10.ms

//Response2

PRINT "CID register"

PRINT "[127:104] 0x" Data.Long(A:(&MMC_BASE+0x1c))

PRINT "[103:72]  0x" Data.Long(A:(&MMC_BASE+0x18))

PRINT "[71:40]   0x" Data.Long(A:(&MMC_BASE+0x14))

PRINT "[39:8]    0x" Data.Long(A:(&MMC_BASE+0x10))

RETURN

SDRAM_INIT:

RETURN

[igorpadykov]

Hi swapnil

you can look at attached cmm file and add there necessary codes.

Best regards

igor

[swapniltiwari]

Hi igor,

do you have any reference cmm file for emmc whatever you have attached is for ddr3

regards

swapnil

[igorpadykov]

Hi swapnil

no. Also suggest to check that SION bit was set in control pads, like

IOMUXC_SW_PAD_CTL_PAD_SD2_CLK, IOMUXC_SW_PAD_CTL_PAD_SD2_CMD

Best regards

igor