USB_OTG2_PWR on imx6ul EVK board is pulled to high with hardware.
I have a customer board and need to pull it with software.
I checked below files, but didn't find similar information.
Documentation/devicetree/bindings/usb/fsl-usb.txt
Documentation/devicetree/bindings/usb/generic.txt
Is there any example of how to configure it in device tree?
Thanks & Best Regards
-Shawn
Solved! Go to Solution.
thanks for all the help.
Below are my settings that made it work.
/arch/arm/boot/dts/imx6ul.dtsi, unchanged | ./arch/arm/boot/dts/imx6ul-14x14-evk.dts, modified |
aliases { gpio0 = &gpio1; gpio1 = &gpio2; usbphy0 = &usbphy1; usbphy1 = &usbphy2; };
usbphy1: usbphy@020c9000 { compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; reg = <0x020c9000 0x1000>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_USBPHY1>; phy-3p0-supply = <®_3p0>; fsl,anatop = <&anatop>; };
usbmisc: usbmisc@02184800 { #index-cells = <1>; compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc"; reg = <0x02184800 0x200>; };
usbotg1: usb@02184000 { compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; reg = <0x02184000 0x200>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_USBOH3>; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc 0>; fsl,anatop = <&anatop>; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; status = "disabled"; }; | &iomuxc { ... pinctrl_usb_otg1: usbotg1grp { fsl,pins = < MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 >; }; };
regulators { … reg_usb_otg1_vbus: regulator@3 { compatible = "regulator-fixed"; reg = <3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb_otg1>; regulator-name = "usb_otg1_vbus"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; regulator-always-on; enable-active-high; }; };
&usbphy1 { tx-d-cal = <0x5>; };
&usbotg1 { dr_mode = "host"; vbus-supply = <®_usb_otg1_vbus>; pinctrl-names = "default"; srp-disable; hnp-disable; adp-disable; status = "okay"; }; |
also, delete the imx6ul-14x14-usb-certi.dtd in Boot section.
thanks for all the help.
Below are my settings that made it work.
/arch/arm/boot/dts/imx6ul.dtsi, unchanged | ./arch/arm/boot/dts/imx6ul-14x14-evk.dts, modified |
aliases { gpio0 = &gpio1; gpio1 = &gpio2; usbphy0 = &usbphy1; usbphy1 = &usbphy2; };
usbphy1: usbphy@020c9000 { compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; reg = <0x020c9000 0x1000>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_USBPHY1>; phy-3p0-supply = <®_3p0>; fsl,anatop = <&anatop>; };
usbmisc: usbmisc@02184800 { #index-cells = <1>; compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc"; reg = <0x02184800 0x200>; };
usbotg1: usb@02184000 { compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; reg = <0x02184000 0x200>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_USBOH3>; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc 0>; fsl,anatop = <&anatop>; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; status = "disabled"; }; | &iomuxc { ... pinctrl_usb_otg1: usbotg1grp { fsl,pins = < MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 >; }; };
regulators { … reg_usb_otg1_vbus: regulator@3 { compatible = "regulator-fixed"; reg = <3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb_otg1>; regulator-name = "usb_otg1_vbus"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; regulator-always-on; enable-active-high; }; };
&usbphy1 { tx-d-cal = <0x5>; };
&usbotg1 { dr_mode = "host"; vbus-supply = <®_usb_otg1_vbus>; pinctrl-names = "default"; srp-disable; hnp-disable; adp-disable; status = "okay"; }; |
also, delete the imx6ul-14x14-usb-certi.dtd in Boot section.
Hello Li,
USB_OTG2_PWR net on schematic is connected to GPIO_2 of I.MX6UL, But this pin is not used, see schematic:
But DCDC_3V3 is used to enable USB OTG2 Power. So GPIO_2 pin doesn't need to be handled in device treee.
In addition, you should read these documents :
(1) i.MX6UltraLite Evaluation Kit|NXP
(2) Reading Linux BSP for i.MX6UL evaluation board.
Have a nice day!
Best Regards,
Weidong
Hi weidong.sun,
Thanks for your reply. I knew the place of schematics about EVK you mentioned, and my question was, with schematics below, how to config device tree?
Thanks & Regards
-Shawn
Hi, in your dts or dtsi file you can specify it as follows (in my example I am using a different GPIO for that) :
pinctrl_reg_usbotg_vbus: reg-usbotg-vbusgrp {
fsl,pins = <
#define OTG_POWER <&gpio3 22 GPIO_ACTIVE_HIGH>
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x030b0
>;
};
The bold color term is the default functionality of the the pin GPIO3_IO22, you can find the correct definition for your pin in pin_function.h file.
Anuradha