Hi everyone
i want to change the mipi csi2 clock to match the FPGA output 1920*1080 60hz video stream
fpga输入 1920*1080 60hz的RGB888码流,mipi csi2 - csi1接口 用4 lane接收,
fpga计算时钟 (1920+280) * (1080+45) * 60 * 24(24 - RBG888输入bit) / 4(4 - 4lane) / 2(2 - 双边沿触发) = 445.5Mhz
因此mipi-csi2 - csi1硬件接口时钟配置445.5Mhz 是对的吗? 或者由于fpga端已有时钟,csi2这边不需要配置时钟,只需要负责接收?
如果csi1硬件接口需要配置时钟来接收fpga码流的话,应该如何配置该时钟?
i use the imx8mq core and kernel version - Linux version 4.14.98-imx_4.14.98_2.0.0_ga
Best regards
zhou
Hi zhouqi
for 4 lane configuration one can look to below link:
https://community.nxp.com/t5/i-MX-Processors/imx8mq-4-lane-mipi-csi-configuration/m-p/1014065
Best regards
igor
Hi igor
Thank you for replying my question.
but i still need to find out if the MIPI clock needs to be set to a certain value , after the FPGA send a clock singal to mipi csi by the clock line.
I really need to figure this out !
So i'm looking forward your reply.
Best regards
zhou