[iMX8X] lpi2c FIFO watermark

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[iMX8X] lpi2c FIFO watermark

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ykrons
Contributor II

Hello,

I have recently done some testing with lpi2c i2c interface on a Toradex iMX8DX Colibri board and I’m not sure how to interpret some register values from the Reference Manual (Rev. 0, 05/2020).

From the lpi2c-imx driver, if I read PARAM register to get the FIFO size I get 0x44. So I have a Read and Write FIFO of 2^4 = 16 words (so I expect to be able to store up to 16 bytes in the RX FIFO). According to the Reference Manual of iMX8, it must be 4 words.

When I read a 9 bytes frames, I would like to set RXWATER to 9 to trig an interruption at the end of the transfer and fully use the FIFO, however if I set it to 9, no interrupt is triggered as if 9 is invalid.

Previously, it was set to 8 and seems to properly trigger interrupts.

My understanding is that RXWATER value is the number of word/byte to store in the RX FIFO before an interrupt is triggered.
Did I misunderstood something ?

Kind regards

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1 Solution
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jimmychan
NXP TechSupport
NXP TechSupport

According to the RM,

RXWATER:

When the number of datawords in the receive FIFO/buffer is greater than the value in this register field,
an interrupt or a DMA request is generated. For proper operation, the value in RXWATER must be set to
be less than the receive FIFO/buffer size as indicated by FIFO[RXFIFOSIZE] and FIFO[RXFE].

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ykrons
Contributor II

Thanks that's clearer. I have to set RXWATER to length of data to receive minus 1.

One other point that is unclear is about the interrupt behavior. What happens if the RDIE interrupt has been disabled, then the FIFO is filled with more datawords than the RXWATER limit and then the RDIE interrupt is enabled again ?

My current assumption is that no interruption will be generated because the 'event' happened when interrupts are disabled. Is it the real behavior ?

Regards

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733 Views
jimmychan
NXP TechSupport
NXP TechSupport

According to the RM,

RXWATER:

When the number of datawords in the receive FIFO/buffer is greater than the value in this register field,
an interrupt or a DMA request is generated. For proper operation, the value in RXWATER must be set to
be less than the receive FIFO/buffer size as indicated by FIFO[RXFIFOSIZE] and FIFO[RXFE].

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