The CTS output is high in idle and output is low when transmitting in the Linux driver, but we need output low in idle and output high when transmitting. How can we achieve it?
&uart1 { /* BT */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
assigned-clocks = <&clk IMX8MM_CLK_UART1>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
fsl,uart-has-rtscts;
linux,rs485-enabled-at-boot-time;
rs485-rts-active-low;
rs485-rx-during-tx;
status = "okay";
};
pinctrl_uart1: uart1grp {
/*
- {pin_num: AC19, peripheral: UART1, signal: uart_tx, pin_signal: SAI2_RXFS, PE: Enabled, PUE: Disabled, HYS: Disabled, SION: DISABLED, FSEL: FAST0}
- {pin_num: AB22, peripheral: UART1, signal: uart_rx, pin_signal: SAI2_RXC, PE: Enabled, PUE: Disabled, FSEL: FAST0}
- {pin_num: AD23, peripheral: UART1, signal: uart_cts_b, pin_signal: SAI2_TXFS, PE: Enabled, PUE: Disabled, ODE: Disabled, FSEL: FAST0, DSE: X6_0}
*/
fsl,pins = <
MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x00000116
MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x00000116
MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x00001916
>;
};
解決済! 解決策の投稿を見る。
Hi Gavin
CTS signal is described in sect.16.2.4.3.3 CTS_B - Clear To Send
i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual
polarity is fixed in hardware and seems can not be changed.
Best regards
igor
Hi Gavin
CTS signal is described in sect.16.2.4.3.3 CTS_B - Clear To Send
i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual
polarity is fixed in hardware and seems can not be changed.
Best regards
igor