iMX8 - Problems bringing up LVDS

[sig0912]

Hi Community!

I'm using a custom board based on the iMX8QM MEK board with U-Boot 2020.04-imx_v2020.04_5.4.47_2.2.0 and Kernel 5.4.94

I'm using yocto and recipe based on image b2qt-embedded-qt6-image.

The hardware configuration used is the following lvds0 -> ds90ub947 -> ds90ub948 -> 12.9 display
The LVDS mode should be dual lvds split mode as seen here https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/IMX8QM-LVDS-mirror-dual-mode-reference-p...

I'm trying to configure the LVDS0 on the imx8qm but facing some issues since I can't detect the LVDS and fb0 from linux

Here is some info about the DRM devices found on my system:

ls /sys/class/drm/
card0 renderD128 version

I should also see card0-LVDS-1... Looks like the LVDS is not enabled but can't figure out what is missing

Here is my device tree (complete device tree is attached)

&ldb1_phy {
status = "okay";
};

&ldb1 {
status = "okay";
fsl,dual-channel;
/*split-mode;*/

lvds-channel@0 {
fsl,data-mapping = "jeida"; // or "spwg"
fsl,data-width = <24>;
status = "okay";

port@1 {
reg = <1>;
lvds0_out: endpoint {
remote-endpoint = <&ds90ub947_0_in>;
};
};
};

lvds-channel@1 {
fsl,data-mapping = "jeida"; // or "spwg"
fsl,data-width = <24>;
status = "okay";
};
};

&i2c0_lvds0 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lvds0_lpi2c0>;
clock-frequency = <100000>;
status = "okay";

serializer@c {
compatible = "ti,ds90ub947";
reg = <0x0c>;
#address-cells = <0x1>;
#size-cells = <0x0>;
#reset-cells = <0x1>;
ti,enable-bchnl-i2c = <0x1>; // I2C Pass All/I2C Passthrough - reg 0x3 bit 3 - reg 0x17 bit 7
ti,enable-bchnl-irq = <0x1>; // Interrupt - 0xc6 bit 0 and 5
ti,deser-addr = <0x2c>; // DES Device ID - reg 0x6 bit 1:7
ti,slave-addr = <0x00>; // Slave ID 0 - reg 0x7 bit 1:7
ti,slave-alias-addr = <0x00>; // Slave Alias ID 0 - reg 0x8 bit 1:7

port {
ds90ub947_0_in: endpoint {
clock-lanes = <3>;
data-lanes = <0 1 2 4>;
remote-endpoint = <&lvds0_out>;
};
};

display-timings {
1920X1080P@60 {
clock-frequency = <71600000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <64>;
hback-porch = <64>;
hsync-len = <16>;
vback-porch = <16>;
vfront-porch = <70>;
vsync-len = <8>;
hsync-active = <1>;
vsync-active = <0>;
};
};
};

deserializer@2c {
compatible = "ti,ds90ub948";
reg = <0x2c>;

#address-cells = <1>;
#size-cells = <0>;
};

// Led Driver for backlight control
lp8860@2d {
compatible = "ti,lp8860";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x2d>;
label = "display_cluster";
};
};

Here is my dmesg | grep imx-drm (complete dmesg is attached)

Spoiler

[ 2.928986] imx-drm display-subsystem: bound imx-drm-dpu-bliteng.2 (ops dpu_bliteng_ops)
[ 2.937140] imx-drm display-subsystem: bound imx-drm-dpu-bliteng.5 (ops dpu_bliteng_ops)
[ 2.945468] imx-drm display-subsystem: bound imx-dpu-crtc.0 (ops dpu_crtc_ops)
[ 2.952866] imx-drm display-subsystem: bound imx-dpu-crtc.1 (ops dpu_crtc_ops)
[ 2.960264] imx-drm display-subsystem: bound imx-dpu-crtc.3 (ops dpu_crtc_ops)
[ 2.967671] imx-drm display-subsystem: bound imx-dpu-crtc.4 (ops dpu_crtc_ops)

Since I'm using split-mode, I'm using both channels on the LVDS0 but only the clock from Channel 0.

Here are my questions:
1 - What configuration do I need to make to see the LVDS-1 device under /sys/class/drm?
2 - What configuration do I need to make to detect the proper display used ? Is it enough to configure the display-timings in the device tree? 
3 - Do I need to configure kms.conf and/or weston.ini at that stage

Thank you in advance for your help

Best Regards,
Ingrid

[josephzhou1]

ok good .

[Zhiming_Liu]

Need more detail about drm which you can enable drm debug mode.

[sig0912 · Accepted solution]

Just an update since it's been a while.

The problem is fixed and the display is working smoothly. 
For some reason defining in the device tree the deserializer node and the display timing inside the serializer node were causing an issue. Also just providing the deserializer I2C address in the serializer node is sufficient.

So I removed the deserializer node and created a panel node to define the display timing like this:

&ldb1 {
	status = "okay";
	fsl,dual-channel;
	
	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <24>;
		status = "okay";
 
		port@1 {
			reg = <1>;
			lvds0_out: endpoint {
				remote-endpoint = <&panel0_input>;
			};
		};
	};
};

/ {
	panel0: panel0 {
		status = "okay";
		compatible = "panel-lvds";
		data-mapping = "vesa-24";
		width-mm = <283>;
		height-mm = <159>;

		panel-timing {
			clock-frequency = <143200000>;
			hactive = <1920>;
			vactive = <1080>;
			hfront-porch = <32>;
			hback-porch = <32>;
			hsync-len = <16>;
			vback-porch = <16>;
			vfront-porch = <70>;
			vsync-len = <8>;
			hsync-active = <1>;
			vsync-active = <0>;
		};

		port {
			panel0_input: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};
};

&i2c0_lvds0 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lvds0_lpi2c0>;
	clock-frequency = <100000>;
	status = "okay";

	serializer: serializer@c {
		compatible = "ti,ds90ub947";
		reg = <0x0c>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		#reset-cells = <0x1>;
		dual-pixel-mode;
		ti,enable-bchnl-i2c = <0x1>;	// I2C Pass All/I2C Passthrough - reg 0x3 bit 3 - reg 0x17 bit 7
		ti,enable-bchnl-irq = <0x1>;	// Interrupt - 0xc6 bit 0 and 5
		ti,deser-addr = <0x2c>;			// DES Device ID - reg 0x6 bit 1:7
		ti,slave-addr = <0x00>;			// Slave ID 0 - reg 0x7 bit 1:7
		ti,slave-alias-addr = <0x00>;	// Slave Alias ID 0 - reg 0x8 bit 1:7
	};
	
	// Led Driver for backlight control
	lp8860@2d {
		compatible = "ti,lp8860";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x2d>;
		label = "display_cluster";
	};
};

Best Regards

[jsmith8831]

@sig0912 what driver are you using?  I don't see the DS90UB947 in the Linux source.  Are you using an out of tree driver that you would be willing to share?  Thanks,

[sig0912]

Hi! sorry for the late response

I cannot share the source code for confidentiality reason but I used the following source code as a base: https://github.com/antmicro/tx2-deep-learning-kit-bsp/blob/master/kernel/display/drivers/video/tegra...

I hope this will help. Let me know if you have any questions regarding the configuration.

Best Regards

[jsmith8831]

Thanks! I wondered if you based it off of this source code. I have it in my kernel now, but needed to work on another area of the project for now. I'll revisit this once I'm working on the SerDes again and let you know if I have any questions. Thanks again!