iMX8 How to set bits in IOMUXC_GPR_GPR2

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iMX8 How to set bits in IOMUXC_GPR_GPR2

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edwardtyrrell
Senior Contributor I

Hi All,

I need some direction on setting the GPR_SAI1_EXT_MCLK_EN in the IOMUXC_GPR_GPR2 register. This is to set the SAI1 MCLK as an input. I have grep'd my entire build a few times for variations of the wording for this register and there is no mention nor definition whatsoever. Normally it will be in a file such as the imx8mm-pinfunc.h or similar. 

Can this register be set in the device tree or is it more 'under the hood'?

Thanks.

 

 

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xiaocong_fu
NXP Employee
NXP Employee

Hi Edward,

You can search IOMUXC_GPR2 and I believe you can find it in the code.

In the rootfs, use the memtool to check its value, the address is 30340008.

# /unit_tests/memtool 30340008 1
E
Reading 0x1 count starting at address 0x30340008

0x30340008: 00000000

Then in the sai driver, you can try to write a value, for example:

regmap_write(the_regmap, IOMUXC_GPR2, the_value_00000001);

After updating the kernel image, use the same memtool command to check if this register modification is valid.

Good luck.

 

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xiaocong_fu
NXP Employee
NXP Employee

Hi Edward,

You can search IOMUXC_GPR2 and I believe you can find it in the code.

In the rootfs, use the memtool to check its value, the address is 30340008.

# /unit_tests/memtool 30340008 1
E
Reading 0x1 count starting at address 0x30340008

0x30340008: 00000000

Then in the sai driver, you can try to write a value, for example:

regmap_write(the_regmap, IOMUXC_GPR2, the_value_00000001);

After updating the kernel image, use the same memtool command to check if this register modification is valid.

Good luck.

 

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edwardtyrrell
Senior Contributor I

Hi,

 

Thanks again that really helps! Regarding the define for IOMUXC_GPR2 I have grep'd the entire build a number of times and with variations of the wording but nothing. Do you have the define for IOMUXC_GPR2 you could email me over? Normally things like this are easily found in the pinctrl include files etc..

My build is Yocto Honister 5.15.5

Cheers.

 

 

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xiaocong_fu
NXP Employee
NXP Employee

You can refer to my search result, I'm also on 5.15

include/linux/mfd/syscon/imx7-iomuxc-gpr.h
11:#define IOMUXC_GPR2 0x08
29:#define IOMUXC_GPR20 0x50
30:#define IOMUXC_GPR21 0x54
31:#define IOMUXC_GPR22 0x58

include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
13:#define IOMUXC_GPR2 0x08

sound/soc/fsl/fsl_mqs.c
316: .ctrl_off = IOMUXC_GPR2,

drivers/video/fbdev/mxc/ldb.c
160: .ctrl_reg = IOMUXC_GPR2,
170: .ctrl_reg = IOMUXC_GPR2,
222: .ctrl_reg = IOMUXC_GPR2,
282: .ctrl_reg = IOMUXC_GPR2,

drivers/gpu/drm/imx/imx-ldb.c
244: regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
330: regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
637: regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);

drivers/pci/controller/dwc/pci-imx6.c
837: IOMUXC_GPR22, val,

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edwardtyrrell
Senior Contributor I

Hi @xiaocong_fu,

Excellent! Think I need to check my word search settings... Appreciate your help and I'll let you know how I get on.

Cheers. 

 

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