Hello,
Our product will be battery powered under certain operating condition.
In order to conserve power, I will be bringing the processor into suspend mode with command
echo mem > /sys/power/state
I noticed some GPIO is brought to a different state. Is it defined in the iomuxc_lpsr structure within the DTS?
&iomuxc_lpsr {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lte_psm>;
...
}
Is there any way that I can define/control GPIO behaviour during processor suspend mode, so I can reduce possible DC leakage current.
If I have unused functionality like MIPI, HDMI, SPI etc. Is it possible for me to shut them down? using DTS? or dynamically?
thank you
Hi Igor,
Thank you for your response.
Is there any sample code? The setting code is in assembly and I don't see any tweaks to the GPIO control registers.
On our design, quite a few circuitry uses the GPIO pins belonging to the EPDC controller.
However, I am seeing different behaviour on the pins during CPU suspend. Most pins will be in the low logic, when the CPU is placed in suspend (echo mem > /sys/power/state), but GPIO_EPDC_SDOE and GPIO_EPDC_GDCLK appears to be in logic high or at lease high-impedence(input) state.
why is it so?
please comment.
Hi Benson
I am afraid it is not possible to configure it in dts file,
one can add gpio setting code in linux/arch/arm/mach-imx/suspend-imx7.S
suspend-imx7.S\mach-imx\arm\arch - linux-imx - i.MX Linux kernel
Best regards
igor
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