Hello.
Answers in many threads explicitly state that the ENET_REF_CLK iMX6 input must be driven by a 125MHz external source. But MCIMX6SX SDB schematics show C346 and R134 as "DNP", so the ENET1_TX_CLK (#A7) pin isn't connected.
1. Are the MCIMX6SX SDB schematics correct? Are C346 and R134 are populated? Or the ENET1_TX_CLK pin is connected to a 125MHz source in another way.
2. If every used RGMII use its own (separate) ENET_REF_CLK input or they can share one iMX6 input?
Best regards,
Vadim Aleynikov
Hi Vadim
1. this was valid for i.MX6DQ/SDL, while i.MX6SX uses upgraded ENET design.
i.MX6SX SDB schematic is correct,
2. use own input
Best regards
igor
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Hi Igor.
Thank you very much for your reply. But it isn't quite clear to me what
the source(s) for the iMX6 ENET_REF_CLK inputs are on the MCIMX6SX SDB
and how exactly they are connected. Could you clarify?
Best regards,
Vadim
2016-07-11 3:52, igorpadykov пишет:
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NXP Community
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iMX6 input RGMII clocks in the MCIMX6SX SDB
reply from igorpadykov
<https://community.nxp.com/people/igorpadykov?et=watches.email.thread>
in /i.MX Community/ - View the full discussion
<https://community.nxp.com/message/810391?et=watches.email.thread#comment-810391>
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Hi Igor.
Unfortunately your message from 2016-07-11 3:52 contained no data. Could you answer my questions?
Best regards,
Vadim
Hi Igor.
Unfortunately your last message contained no data:
2016-07-11 3:52, igorpadykov пишет:
>
NXP Community
<https://community.freescale.com/resources/statics/1000/35400-NXP-Community-Email-banner-600x75.jpg>
>
iMX6 input RGMII clocks in the MCIMX6SX SDB
reply from igorpadykov
<https://community.nxp.com/people/igorpadykov?et=watches.email.thread>
in /i.MX Community/ - View the full discussion
<https://community.nxp.com/message/810391?et=watches.email.thread#comment-810391>
Could you answer my questions?
Best regards,
Vadim