Hi,
I have an issue related to the busfreq driver on our custom i.mx7 design. Up until our latest (2nd) build we've had no issues, however with our latest build, roughly 30% of the boards are locking up when busfreq drops the clock down to 24MHz.
One key different between the builds is that the 16bit DDR3 part has changed from a Micron part to an alliance part:
Previous part: MT41K256M16TW-107
New part: AS4C256M16D3LB-12BIN
I couldn't be missing something, but from what I can read in the datasheets, there is no reason for the new alliance part to not work. And it does for most of the 15 boards built so far.
I have run the DDR v2.70 stress tool on various boards at various frequencies (350-533). All pass regardless of the DDR and the calibration result values are all the very close to the same. The stress test tool does not allow to run tests the the lower power mode (24MHz), at least not the u-boot variant, so I am not able to test at that frequency using this tool.
I've also slightly modofied the busreq driver to go to the "audio mode" (100MHz) instead of the low power mode (24MHz). I get the same results with this change (i.e. some boards work ok and some boards lock up as soon as the clock is changing).
I did see this post which may or may not be related, however i didn't draw any conclusions from it:
i.MX7 with 400MHz DDR3L hangs when exiting self-refresh
Any advice is appreciated.
Thanks,
Tim Meyer
Hi Victor,
I do not have a problem with the CPU frequency scaling. Are you insinuating the issue I am seeing may be related to the CPU frequency? I currently have CPU scaling enable, and I haven't seen any issues related to operating the CPU at the various frequencies.
My understanding of what I am seeing is that the DDR bus frequency change over presents a problem on some boards but not others. I've tried various DDR clock speeds by making slight modification to the clock dividers in the busfreq driver.
Thanks,
Tim Meyer
We have a patch that updates busfreq change flow on i.MX7D.
However it is not public one and I may not attach it to the community.
James Davis created a technical case regarding your question and I send him the patch.
If you did not it please create a technical case yourself and I will send you this patch.
https://community.nxp.com/thread/381898
Have a great day,
Victor
Hi, I have received the patch. I applied it to our kernel and tried it on a non-working board using the Alliance DDR3.
Unfortunately there is no change when going into 24MHz.
I will try various DDRC_RFSHTMG values to verify if they make a difference. If you have some suggested values for me to try (or any other test), I'd appreciate it.
Thanks!
Tim Meyer
It seems there are different timings between Micron and Allicance DDR components.
Which release version do you use?
Can you udpate BSP to the latest release?
If no, you can try to modify DDRC_RFSHTMG register value (bigger or smaller) after you patched the code.
Have a great day,
Victor
Hi, I've played around with various RFSHTMG values without success. I tried bigger and smaller.
I also used the "MX7D_DDR3_register_programming_aid_v1_2.xlsx" and set the various registers that change due to the different timings. No luck.
Thanks,
Tim
You can find an example to change frequency in chapter 23 "CPU Frequency Scaling (CPUFREQ) Driver" of i.MX Linux Reference Manual:
https://www.nxp.com/webapp/Download?colCode=L4.1.15_2.0.0-LINUX-DOCS
Have a great day,
Victor
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