iMX8MM U-Boot hangs after SPL

[michalhorn]

Hello dear experts,

I am quite new to U-Boot and iMX8 and I am struggling with updating the U-Boot to newer version for our imx8mm variscite som based product.

Previous U-Boot version was 2019.04 and I need to update to 2020.04.

What happens is that everything goes well, until regular U-Boot should be executed.

SPL is fine, ATF is fine as well. Last UART message I get is: 

Found FIT
fit read sector 300, sectors=3, dst=401ff840, count=3, size=0x558
Selecting config 'fsl-imx8mm-var-som'firmware: 'uboot@1'
External data: dst=40200000, offset=3000, size=a2e28
Load_addr data at 0x40200000
a 0 0 14 1f 20 3 d5 0 0 20 40 0 0 0 0 28 2e a 0
Selecting config 'fsl-imx8mm-var-som'fdt: 'fdt@2'
Can't get 'load' property from FIT 0x401ff840, node: offset 364, name fdt@2 (FDT_ERR_NOTFOUND)
External data: dst=402a2e40, offset=add40, size=80a2
Load_addr data at 0x402a2e40
0 0 0 10 0 0 0 0 0 0 8 b2 0 0 77 b8 0 0 0 0 ...
Selecting config 'fsl-imx8mm-var-som'loadables: 'atf@1'
External data: dst=920000, offset=bdf98, size=b160
Load_addr data at 0x920000
0 6 81 d2 a0 18 a6 f2 0 10 1e d5 df 3f 3 d5 f8 21 0 94 ...
Selecting config 'fsl-imx8mm-var-som'fdt: 'fdt@2'
Can't get 'load' property from FIT 0x401ff840, node: offset 364, name fdt@2 (FDT_ERR_NOTFOUND)
External data: dst=92b180, offset=add40, size=80a2
Load_addr data at 0x92b180
0 0 8 b2 0 0 77 b8 0 0 0 0 0 0 0 0 0 0 0 0 ...
Selecting config 'fsl-imx8mm-var-som'no string for index 1
Jumping to U-Boot
loaded - jumping to U-Boot...
image entry point: 0x920000

I tried to make the imx-boot binary with the old U-boot and this combination of 2020.04 SPL, actual ATF and 2019.04 U-Boot boots fine (at least until hush shell). So I am quite sure the error is somewhere in the U-boot 2020.04 or how it is mapped/executed.

So my question is, if someone could explain to me, what happens on the SPL->ATF->U-Boot transition. I can see jumping to address 0x920000, where ATF should be loaded. What happens next? Where should the regular U-boot be located, how it gets executed?

Thank you very much for any advice.

[igorpadykov]

Hi Michal

for this third party variscite som board one can look at variscite build steps

https://variwiki.com/index.php?title=DART-MX8M-MINI_Yocto&release=RELEASE_WARRIOR_V1.0_DART-MX8M-MIN...

Addresses layout can be found in mkimage sources

https://source.codeaurora.org/external/imx/imx-mkimage/tree/iMX8M/mkimage_fit_atf.sh?h=lf-5.10.y_2.0...

Best regards
igor

[michalhorn]

Hello Igor,

thank you for the reply. The original U-boot (or when I combine parts of it in my setup) are building fine.

I checked the fit image generator and it is the same I am using.

I guess, the error may be either:

1) CPU jumps on invalid address after ATF

2) Some DTS handling has changed in 2020.04

Regarding 1) Do you know how is the program flow with ATF? My expectation is that U-boot is loaded at 0x40200000, while ATF firmware is at 0x920000. Once ATF firmware is through, CPU should jump to U-boot (How?). From my experiments, CPU jumps to the ATF entry point, which is from where I get the last UART message. By combining 2020.04 SPL, ATF and 2019.04 U-Boot by the FIT mkimage tools I get to the U-Boot 2019. So I guess the tools are mapping things correctly and the issue should not be here.

So that is how I came to 2), because I have no better idea. I am using the original dts from the 2019 version and I guess that if there have been some changes in DTS handling, the U-Boot may fail to init. But I can be wrong. 

Is there any reliable low-level way (some assembly or whatever) to restart the CPU? I would like to put these at the very beginning of U-Boot init_sequence to know if the CPU at least gets there.

[igorpadykov]

Hi Michal

for ATF one can look at ARM resources

https://developer.arm.com/tools-and-software/open-source-software/firmware/trusted-firmware

https://chromium.googlesource.com/external/github.com/ARM-software/arm-trusted-firmware/+/v0.4-rc1/d...

>Is there any reliable low-level way (some assembly or whatever) to restart the CPU?

I a afraid not. On i.MX8M Mini EVK (SPF-31399 schematic) reset is implemented with WDOG_B signal

resetting pmic (and all board) on p.12    i.MX 8M Mini Evaluation Kit LPDDR4 Design Files

Best regards
igor