Hello,
I have a question concerning the High/Low-Level input voltage at the RGMII interface of the i.Mx6.
In the IMX6DLCEC is the High/Low-Level input voltage at the RGMII interface not directly defined. Is it the same like specified for the GPIOs 0.7*OVDD and 0.3*OVDD?
Also I have not found the sample and hold time for the RGMIII interface, althouh they mentioned in Figure 55?
I asume they are the same as defined in the RGMII v 2.0 specification (http://www.google.de/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&cad=rja&uact=8&ved=0CCEQFjAA&url=http... ). Right?
Best wishes
Mark78
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Hello Mark78,
The voltage levels are the same of the GPIO PADs which are as you mentioned the ones listed on Table 22 (GPIO I/O DC Parameters) of the i.MX6D/Q Data Sheet.
As for hold times please refer to the RGMII specification. These are not listed because they may be as little as required per processor’s capabilities but must comply with the specification so it’s more a matter or standard compliance than of HW limitations.
Hello Mark78,
The voltage levels are the same of the GPIO PADs which are as you mentioned the ones listed on Table 22 (GPIO I/O DC Parameters) of the i.MX6D/Q Data Sheet.
As for hold times please refer to the RGMII specification. These are not listed because they may be as little as required per processor’s capabilities but must comply with the specification so it’s more a matter or standard compliance than of HW limitations.