i.MX8MQ / i.MX8MQL: how to use USB control signals

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i.MX8MQ / i.MX8MQL: how to use USB control signals

Contributor III


on our designs we do not plan to use the Type-C support chip used on imx8mqevk. I'm a bit confused after reading the reference manual

1) Why are there two pins for US OTG ID (USB_P1_ID / USB1_OTG_ID)?

2) What are the active levels for USB1_OTG_OC, USB1_OTG_PWR, USB1_OTG_ID?

Thank in advance


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NXP TechSupport
NXP TechSupport



  Below are some comments regarding the issue.



 I.MX8M has two USB ID options / pins, say, for USB1: USB1_ID and USB1_OTG_ID.

The first is part of internal USB PHY and cannot be configured / mux-ed for other functionality.

The second may be used as GPIO.

  Customers can use any of USB1_OTG_ID or USB1_ID signals for USB ID functionality.

USB1_ID does not require configuring. USB1_OTG_ID needs reconfiguring GPIO1_IO10 for USB ID

functionality. Also it is possible a variant, when GPIO1_IO10 is configuring as GPIO output and

connected to external USB ID signal (of another USB device) in order to control it.



  Section “I/O DC parameters” in i.MX8M Datasheet(s) state about the following I/O types:

- General Purpose I/O (GPIO);

- Double Data Rate I/O (DDR) for LPDDR4, DDR4, and DDR3L modes;

- Differential I/O (CLKx).


  USB1_OTG_OC and USB1_OTG_PWR may be considered as GPIOs from I/O DC parameters

point of view.

  Parameters of USB1_OTG_ID relate to general USB specs:

- ID < 10 Ohm to GND means USB Host mode;

- ID > 100 KOhm means USB Device mode.


 Voltage, applied to the ID pin, must not exceed power supply voltage for this pin.

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Contributor III

Tanks for the reply.

1) First part of the question is now clearer. But this rises a new question when reading the relevant driver code (4.14.78_1.0.0, seems to me no differences in 4.14.98_2.0.0): Current implementation needs an extco derive, so we need to use the gpio option for OTG ID

2) Let me ask the question in another way. If muxing these signals for the USB controller, what are the logic levels for

PWR out: 0 or 1

OC in: 0 or 1

(as I recall from i.MX6 etc. these were configurable for these SOC but found no documentation for i.MX8MQ[L])

Thanks in advance



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NXP TechSupport
NXP TechSupport

Hello, Markus!

   Yes, if custom board schematic is not the same as reference design, some software modifications 

are needed - in such case GPIO approach is more simple.

   As for voltage levels - from GPIO DC parameters in the Datasheet:
High-level output voltage > 2.4 V for 3.3 V logic.
Low-level output voltage < 0.2 V for 3.3 V logic.

High-level input voltage > 0.7 x VDD

Low-level input voltage < 0.2 x VDD