May I know the low power mode settings to be made in hardware design? And kindly detail about the use of SNVS_TAMPER pull down 1M resistors?
Instead of providing pull down to all the SNVS_TAMPER pins, I have given in the above format. Is that okay?
Hi Theevan
SNVS_TAMPER pins are associated with VDD_SNVS_IN,
in system power-down mode VDD_SNVS_IN is powered from battery.
Example of connections can be found in i.MX6ULL EVK schematic.
Schematics (1)
Design files, including hardware schematics, Gerbers, and OrCAD files.
MCIMX6ULL-EVK_DESIGNFILES
http://www.nxp.com/products/software-and-tools/software-development-tools/i.mx-software-and-tools/ev...
>Instead of providing pull down to all the SNVS_TAMPER pins, I have given in the above format. Is that okay?
seems yes
Best regards
igor
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