We are having an issue with the USB port on the
IMX6SL. The voltage swing of the USB D- & D+ are not meeting spec as
you can see in the Eye Diagram of the attachment. Is there someone at
NXP/Freescale that can help me here? These signal come directly from the
processor. We only use USB Device mode only.
igorpadykov can you help to continue with the follow up?
Hi Dustin
for tweaking of usb phy parameters one can follow
AN4589 Configuring USB on i.MX 6 Series Processors
http://cache.nxp.com/files/32bit/doc/app_note/AN4589.pdf
Also recommended to check layout as described in sect.
3.11 USB recommendations i.MX6 System Development User’s Guide
http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf
Best regards
igor
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Hi,
I have tried different combination on the USBPHYx_TXn register that contains the TXCAL45DP, TXCAL45DN and D_CAL to see if the DP and DN signal would increase to 3Volts with any luck. According to the 53.2.6 section, changing these bit should have some effect on the output signal, we did not see any change of signal level. Can you please explain why?
I have run print jobs from a standard PC computer and hooking up scope probes to the DN and DP signals. The signals only swing from 0 to 2.68V. Our system is in a device mode running FS (12Mhz). We laid out the board trace for 90 ohm. Also we have tried changing the value and we see no change in the output voltage. Please help , we trying to launch the product. Let us know if you need anything else. Thanks.
Hi Dustin
could you check processor VDD_USB_CAP (should be 3.0V),
p.6 i.MX6SL EVK schematic spf-27452 and check p.9 USB section
Schematics (2)
Design files, including hardware schematics, Gerbers, and OrCAD files. (REV 1)
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx-applications-process...
Voltage can be changed using PMU_REG_3P0 register. How many boards have this issue,
also could this be reproducable on i.MX6SL EVK, are signals ok in USB Host mode?
Please note that eye diagram is applicable to device which is be capable of sending the
Test_Packet pattern, that it should be in Host mode (just for reference attached usb\test\usb0_host_testmodes_test.c
with description in pdf document sect.34.9 Testing the host mode).
Best regards
igor
Hi Igor,
The customer measured the VDD_USB_CAP and the voltage only gets to 2.58V. How do we get that voltage to 3V?
Dustin
Hi Dustin
seems processor is damaged or there are some board
layout errors (for example shortcircuits or broken traces).
Best regards
igor
Hi Igor,
The customer wants to know how to change the register PMU_REG_3P0 as you recommended earlier to get them up to 3V. Thanks.
Dustin
Hi Dustin
field OUTPUT_TRG register PMU_REG_3P0
sect. 36.7.2 Regulator 3P0 Register (PMU_REG_3P0)