Hi
We have setup SSI master mode to provide clock to slave codec.
We found that Audio channel data swap after hardware reboot.
After debug I found that
In normal case we should get TUE0 ISR first and TUE1 ISR next to TUE0.
But when reboot/next boot occurs we are getting TUE1 ahead or TUE0. Which make data order change
How to fix this issue?
Thanks
Saurabh
Hi Saurabh
probably codec did not stop after reboot and become
out of sync after processor rebooted. One can try to stop codec
and reinitialize both processor and codec.
Best regards
igor
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Hi igor,
This issue happens with simple PCM or wav file playback.
Also happens after system power off also.
What should be correct approach if we get TUE1 ISR ahead of TUE0 ISR?
Thanks
Saurabh
Hi Saurabh
what BSP are you using, had you tried
latest Freescale L3.14.28_1.0.0_iMX6QDLS_BUNDLE
Best regards
igor
Hi Igor,
We are using 3.10.17, its hard to update kernel at this stage, Only this issue is remaining.
I have refer 3.14.28 kernel code, which has FIQ implementation.
Thanks
Saurabh