[i.MX6DL] ERR004489: detailed description of RX_EQ[2:0]

[yutaka_ando]

I cannot find detailed description of RX_EQ[2:0] bits in RX_OVRD_IN_HI register in neither chip errata nor reference manual.  I think RX_OVRD_IN_HI[RX_EQ_OVRD] enables overriding PCIe2 Rx equalizer setting by RX_EQ[2:0] bit.  But what does each RX_EQ[2:0] value mean?

[yutaka_ando]

I get the following comment from an NXP internal thread,

It is auto-adjusting setup link. Please don't use the workaround. Keeping the default value is ok.

[gusarambula]

Hello Yutaka Ando,

My apologies for the delay. The RX_EQ refers to the PCIe equalizer settings which result in an adaptive filter. The RX_EQ would be one of the coefficients for this filter.

The possible RX_EQ values should be generated trough equalization training to obtain the optimal value, similarly to calibration on the DDR3 standard.

I hope that this helps!

Regards,

[yutaka_ando]

Hello gusarambula‌, 

Thank you for the answer.

The possible RX_EQ values should be generated trough equalization training to obtain the optimal value,

What register holds the equalization training?  PCIE_PHY_RX_ASIC_IN?

If so, the actual procedure of the workaround for ERR004489 will be

  1. read a value from PCIE_PHY_RX_ASIC_IN[RX_EQ]

  2. write the value to RX_OVRD_IN_HI[RX_EQ] with RX_OVRD_IN_HI[RX_EQ_OVRD]

Is this correct?