i.MX53 VPU decoder output timing

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

i.MX53 VPU decoder output timing

跳至解决方案
778 次查看
torus1000
Contributor V

Hi Chip experts,

I have a quesion when i.MX53 VPU decoded data write to the frame buffer.

Which timing is correct?

a)  data wrote per each microblock decoded
b)  or data wrote only when whole frame decoded

Thanks.

标签 (1)
标记 (1)
0 项奖励
回复
1 解答
674 次查看
joanxie
NXP TechSupport
NXP TechSupport

The VPU has an internal DSP called the BIT processor which controls the internal hardware blocks for

video decoder operations.

The BIT processor completes decoding operations on a frame-by-frame basis, which allows low level

independency of VPU operations to the host processor

在原帖中查看解决方案

0 项奖励
回复
1 回复
675 次查看
joanxie
NXP TechSupport
NXP TechSupport

The VPU has an internal DSP called the BIT processor which controls the internal hardware blocks for

video decoder operations.

The BIT processor completes decoding operations on a frame-by-frame basis, which allows low level

independency of VPU operations to the host processor

0 项奖励
回复