i.MX 93 ADC Hardware Triggers Combined GPIO interrupt.

[NZP]

Hello Experts,

I want to read I.MX 93 ADC CH0 using hardware trigger (Rising Edge) of GPIO1's pin GPIO1.IO[0] but after reading RM of imx93 I got below details.

72.1.2 Hardware Triggers

So, my question is that,

1. Combined interrupt indication for all GPIO1 signal means:  will my ADC CH0 trigger when Rising Edge comes on any interrupt configured PIN of GPIO1 port?

Thanks.

[Zhiming_Liu · Accepted solution]

Hi @NZP 

Yes, th IRQ logic in GPIO1 is OR. The IRQ10 will be handled.

Best Regards

Zhiming