i.MX 8M plus PPS pinout

[flobue]

Hello

I am trying to get the PPS of the ENET QoS module to work, on an i.MX 8M plus.

And I need some clarification on the differences between the ENET_QOS_1588_EVENTx and the PPSx.

Firstly I thought, that the ENET_QOS_1588_EVENTx is simply the output of the PPSx. However:
When writing 0x02 to the IOMUXC_SW_MUX_CTL_PAD_SAI2_TXFS register (Select ALT2 ENET_QOS_1588_EVENT3), a PPS? is visible at the pin (when PTP is enabled with ptp4l).
But no config of a PPS does anything to it (eg. writing 0x50d7a960 to MAC_HW_FEATURE2 to disable all PPS).

So what is the difference between the ENET_QOS_1588_EVENTx and the PPSx?
Is the ENET_QOS_1588_EVENTx simply the output of the PPSx? If so, Why can I not change anything at the output?
If they are independent functionalities, on what does the event trigger, how can I manipulate it? And which pins can be used as an output of the PPS?

Sadly, I cannot find anything to these questions in the reference manual or the datasheet.

Regards and thanks for your help

[Sanket_Parekh]

Hi @flobue 

I hope you are doing well.

One can use the ENET_QOS_1588_EVENTx_OUT pin to output the PPS signal.

PPSOUTNUM[26:24] bit of MAC_HW_FEATURE2 register seems to be a read-only register and it indicates the number of PPS outputs.

It does not disable PPS outputs.

Please refer to 11.7.2.5.8 Flexible Pulse-Per-Second Output in i.MX 8M Plus Applications Processor Reference Manual for more information.

Thanks & Regards,

Sanket Parekh

[flobue · Accepted solution]

Thanks for the clarification!

My mistake was, that I thought, that the base address of the enet_qos was at 4043_C000h, as specified in chapter 11.7.6.1.1 "ENET_QOS memory map" of the reference manual. The correct base address is 30BF_0000h as specified in 2.5 "AIPS Memory Maps".

Is there some reason, for the different address in chapter 11.7.6.1.1? Or is this an error in the reference manual?

Regards

[Sanket_Parekh]

Hi @flobue 

I hope you are doing well.

The base address of  EQOS ENET is 30BF_0000h as specified in 2.5 "AIPS Memory Maps" in RM.

There seems to be some printing mistake.

As the address above 4000_0000h falls under the DDR region.

/arch/arm64/boot/dts/freescale/imx8mp.dtsi also have 30BF_0000h address.

eqos: ethernet@30bf0000

Thanks & Regards,

Sanket Parekh