i.MX 8M Plus - Common timer peripheral for A53 and M7

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i.MX 8M Plus - Common timer peripheral for A53 and M7

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stp_s
Contributor I

Dear NXP Community,

In my application both CPU's A53 (Yocto Linux) and M7 (freeRtos) run in parallel. On both processors time measurements are required with one common time reference, min resolution around 1us.
The datasheet lists System Counter (SYS_CTR), which to me seems exactly what I need: one timer peripheral, ready to be used by both processors in parallel!
imx8mp.dtsi defines system_counter and on the running linux system /proc/time_list shows that it is used as "Broadcast device". /proc/interrupts shows that it is used by all A53 CPU's extensively!
The driver implementation timer-imx-sysctr.c shows that the peripheral is turned off and on again each time a new event is set, however and I do need a continuouse running timer.

So my questions are:
1) Is there any way to use SYS_CTR for my purpose?
2) If 1) is No, is there a way to use one of the GPT's? If so, how? Can concurrent access be handled by RDC? Can you share an example on how to integrate a GPT with Linux on a i.mx8m plus device to be used from user space?

BR

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cafoutch
Contributor I

Hi @stp_s ,

Having similar application needs, did you manage to use SYS_CTR for timing info betwwen A53 and M7 ? If yes, how did you do ?

Thanks and best regards

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Juan-Rodarte
NXP Employee
NXP Employee

Hello,

You can check the reference manual, section 4.11 is about the System Counter

https://www.nxp.com/webapp/Download?colCode=IMX8MPRM

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