Hi,
I want to use i.MX 6SoloLite + DDR3 in my design, because the LPDDR2 is very expensive, anyone has the reference design and source code?
We too are attempting to use DDR3 (x32 (two x16 BGA parts)) with iMX6 Solo Lite - for cost reasons.
We are having great difficulty in trying to route this on 6 layers.
Is there now a Freescale reference layout for this ?
Has anyone done this and succeeded ?
Is this still needed ?
Schematic you have sent to me, we wish FSL can provide the U-BOOT and Kernel patch file.