the imx6 integrated pmu has 3 digital ldo.
how to make it work in external bypass mode?
in the page 4407of rm:
TRAG==0x1F internal bypass mode
TRAG==0x1F POWER GATE mode
but how to work in the other two mode?
if work in internal bypass mode , for the dvfs ,how to modify the voltage,since the power is from out directly?
and as for sabre lite,does it work in the internal bypass mode?how can it support the dvfs?
thanks!
Hi Senix,
Can I know why you want to use internal LDO bypass mode with DVFS?
For DVFS function, the power supply should be changed acording the frequency.
In another words, we need a dynamic power supply.
The power supply is a fixed design in SabreLite.
hi lin
sorry,maybe I did'nt make it clear,we didn't intend to make imx6 work in any special mode。
we just want to know
1) what's the difference between internal bypass mode and the external bypass mode?
2) if we use rt8070 like the sabre lite, which mode does the 3 digital ldo(arm pu soc)work in?
if we use panic like the sabre board,which mode does the ldo(arm up soc)work in?
3)can imx6 work with lower frequency and higher Votage? that is, as for sabre lite,can we make
the dvfs with the highest votage.
thanks
The question 2: it is not 'panic'. it is 'pmic'. If we use discrete power ic--rt8070,like sabre lite,which mode does the 3 Ldo(arm pu soc) work in? If we use pmic like sabre board, which mode does the 3 ldo(arm pu soc)work in?
Hi Senix,
1. I believe you mentioned "internal bypass mode" should be "internal LDO bypass mode", now it looks make sense,right? I don't know where the define "External bypass mode" come from? and i don't know what's the meaning.
2. Discrete power IC is used: option one: DVFS enable, internal LDO must be enabled;option two: DVFS disable, internal LDO can be enabled.
3. yes, imx6 can work with lower frequency and higher Votage. but DVFS can't provide more contribution on power saving under this condition.
hi lin
1. internal bypass,External bypass come from RM(rev. 1,04/2013) page 4441(50.2)
2. If Discrete power IC is used and DVFS disabled, which mode does the 3 ldo woke in?
If Discrete power IC is used and DVFS enabled, which mode does the 3 ldo woke in?
3 Are there just the 4 modes(metioned in RM(rev. 1,04/2013) page 4441 ) that the 3 ldo work in?
Is there more detailed doc about it?
Hi Senix,
Thanks for your info!
As I know, only Internal Bypass and Power Gated mode is available on FSL's reference design.
That's enough for actuall application design.
No other doc show these info now.
Please follow our reference design and SW.
If you have specific requirement, please let us know!
Thanks!