I am using flexspi interface on a IMX8MM to talk to an FPGA that simulates flash in SDR mode on 4 data lines (maybe DDR later). I'm using AHB bus cmd mode, and toggle between custom write and read QUAD cmds :
I need to optimize speedrate :
Any comment on this ? How can I optimize data transfer rate ?
If this is still useful, the NXP i.MX BSP exclusively supports memory device access on the i.MX 8M Mini FlexSPI the basic components for driving the FlexSPI are present in spi-nxp-fspi.c. This could serve as a basis for a more general-purpose "spidev" driver described in Documentation/spi/spidev.rst