Hi, NXP:
right now, we are trying to change the lpddr4 size from 6G to 128MB.
after some try and error, we found the current minimal lpddr4 size is 352MB.
the 352MB is come from tracing u-boot code in arch/arm/mach-imx/imx8m/soc.c
and include/configs/imx8mp-evk.h.
We found if setting PHYS_SDRAM_SIZE to 0x08000000(128MB), and skip the
rom_pointer[0] assignment, which points out the TEE start address, the u-boot loader will
complain error while booting .
After some searching about ddr size change in nxp community, It seems TEE could be disabled. but we don't know how disable from yocto. we found TEE could be disabled from u-boot menuconfig, driver section. but this will cause u-boot building failed.
the another way is try to keep TEE region, and change the TEE address from 0x56000000 to 0x46000000, which make TEE region could be inside in 128MB. but we don't know the TEE address could change or not.
Could NXP do us a favor to show how to change LPDDR4 size from 6G to 128MB with or without TEE enabled ?
Many thanks.
BR, Akio
Hi, NXP:
Finally, we could only using 128MB to boot linux kernel. the linux kernel only use 40MB below.
It could reduce more, all depend on what kind functionality user needs.
Many thanks.
BTW, the documents seems to be update to the latest BSP setting.
BR, Akio
Hi, Igor:
Many thanks. after remove optee related setting from yocto, and set the ddr size in include/configs/imx8mp-evk.h, arch/arm/dts/imx8mp-evk.dts, arch/arm/dts/imx8mp.dtsi(remove cma), we could see the rom_pointer[0] is zero and the ddr size is 128MB. But the error still remained. it is the same. for the linux kernel configuration is not modified.
The below is the error message.
==============================================================================================
U-Boot SPL 2021.04-5.10.35-2.0.0+g84d81e0 (Aug 19 2021 - 07:20:10 +0000)
DDRINFO: start DRAM init
DDRINFO: DRAM rate 4000MTS
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
SEC0: RNG instantiated
Normal Boot
WDT: Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
NOTICE: BL31: v2.4(release):lf-5.10.35-2.0.0-rc2-0-gec35fef
NOTICE: BL31: Built : 09:05:55, May 28 2021
U-Boot 2021.04-5.10.35-2.0.0+g84d81e0 (Aug 19 2021 - 07:20:10 +0000)
CPU: i.MX8MP[8] rev1.1 1800 MHz (running at 1200 MHz)
CPU: Commercial temperature grade (0C to 95C) at 25C
Reset cause: POR
Model: NXP i.MX8MPlus LPDDR4 EVK board
DRAM: 128 MiB
TCPC: Vendor ID [0x1fc9], Product ID [0x5110], Addr [I2C2 0x50]
SNK.Power3.0 on CC1
PDO 0: type 0, 5000 mV, 3000 mA [E]
PDO 1: type 0, 9000 mV, 3000 mA []
PDO 2: type 0, 15000 mV, 3000 mA []
PDO 3: type 0, 20000 mV, 2250 mA []
Requesting PDO 3: 20000 mV, 2250 mA
Source accept request
PD source ready!
tcpc_pd_receive_message: Polling ALERT register, TCPC_ALERT_RX_STATUS bit failed, ret = -62
Power supply on USB2
TCPC: Vendor ID [0x1fc9], Product ID [0x5110], Addr [I2C1 0x50]
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment
[*]-Video Link 0adv7535_mipi2hdmi adv7535@3d: Can't find cec device id=0x3c
fail to probe panel device adv7535@3d
fail to get display timings
probe video device failed, ret -19
[0] lcd-controller@32e80000, video
[1] mipi_dsi@32e60000, video_bridge
[2] adv7535@3d, panel
"Synchronous Abort" handler, esr 0x96000046
elr: 000000004029924c lr : 0000000040226524 (reloc)
elr: 0000000046f9424c lr : 0000000046f21524
x0 : 0000000050000000 x1 : 0000000046fc3838
x2 : 000000000000ba36 x3 : 0000000000000000
x4 : 00000000ba364d42 x5 : 0000000000000010
x6 : 00000000ffffffe0 x7 : 0000000046fa32b8
x8 : 0000000000000008 x9 : 000000004c0ab815
x10: 0000000000000044 x11: 000000000000000d
x12: 0000000000000006 x13: 000000000001869f
x14: 0000000044eef420 x15: 0000000000000002
x16: 0000000046f50434 x17: 0000000000004340
x18: 0000000044efada0 x19: 0000000046fc37a0
x20: 0000000050000000 x21: 0000000046fc36f0
x22: 0000000000000000 x23: 0000000000000000
x24: 0000000000000000 x25: 0000000000000000
x26: 0000000000000000 x27: 0000000000000000
x28: 0000000000000000 x29: 0000000044eef2a0
Code: eb03005f 540001c1 d65f03c0 f8636824 (f8236804)
Resetting CPU ...
resetting ...
==============================================================================================
Where were we missed?
Many Thanks.
BR, Akio
Hi, Igor:
the BSP we used is "i.MX Linux Yocto Project BSP 5.10.35_2.0.0 Release"
BTW, if disable TEE device driver, the u-boot build still failed.
BR, Akio
Hi Akio
> It seems TEE could be disabled. but we don't know how disable from yocto
one can try to follow sect.5.6.10 OP-TEE enablement i.MX Yocto Project User’s Guide
also additional info was sent you via mail.
Best regards
igor