Hi community,
I have a question about i.MX6DQ u-boot for L3.10.17_1.0.2_ga.
I'm looking for the source codes to set VDD_ARM_CAP, VDD_SOC_CAP, and VDD_PU_CAP.
Then, I found the following post and the code is in <u-boot>/arch/arm/cpu/armv7/mx6/soc.c.
u-boot VDD_SOC_CAP, VDD_PU_CAP
According to this file, VDD_SOC_CAP is set to 1.2V and VDD_PU_CAP.
However, I could not find the code to set VDD_ARM_CAP.
Then, would you let me know where is the code to set VDD_ARM_CAP?
Best Regards,
Satoshi Shimoda
已解决! 转到解答。
Hello Shimoda-san
On my u-boot version it has the following code:
enum ldo_reg {
LDO_ARM,
LDO_SOC,
LDO_PU,
};
/*
* Set the PMU_REG_CORE register
*
* Set LDO_SOC/PU/ARM regulators to the specified millivolt level.
* Possible values are from 0.725V to 1.450V in steps of
* 0.025V (25mV).
*/
static int set_ldo_voltage(enum ldo_reg ldo, u32 mv)
{
struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
u32 val, step, old, reg = readl(&anatop->reg_core);
u8 shift;
if (mv < 725)
val = 0x00; /* Power gated off */
else if (mv > 1450)
val = 0x1F; /* Power FET switched full on. No regulation */
else
val = (mv - 700) / 25;
clear_ldo_ramp();
switch (ldo) {
case LDO_SOC:
shift = 18;
break;
case LDO_PU:
shift = 9;
break;
case LDO_ARM:
shift = 0;
break;
default:
return -EINVAL;
}
old = (reg & (0x1F << shift)) >> shift;
step = abs(val - old);
if (step == 0)
return 0;
reg = (reg & ~(0x1F << shift)) | (val << shift);
writel(reg, &anatop->reg_core);
/*
* The LDO ramp-up is based on 64 clock cycles of 24 MHz = 2.6 us per
* step
*/
udelay(3 * step);
return 0;
}
int board_postclk_init(void)
{
set_ldo_voltage(LDO_SOC, 1175); /* Set VDDSOC to 1.175V */
return 0;
}
Maybe you could use this to set the voltage on your end.
Best regards
Yuri
Hello Shimoda-san
On my u-boot version it has the following code:
enum ldo_reg {
LDO_ARM,
LDO_SOC,
LDO_PU,
};
/*
* Set the PMU_REG_CORE register
*
* Set LDO_SOC/PU/ARM regulators to the specified millivolt level.
* Possible values are from 0.725V to 1.450V in steps of
* 0.025V (25mV).
*/
static int set_ldo_voltage(enum ldo_reg ldo, u32 mv)
{
struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
u32 val, step, old, reg = readl(&anatop->reg_core);
u8 shift;
if (mv < 725)
val = 0x00; /* Power gated off */
else if (mv > 1450)
val = 0x1F; /* Power FET switched full on. No regulation */
else
val = (mv - 700) / 25;
clear_ldo_ramp();
switch (ldo) {
case LDO_SOC:
shift = 18;
break;
case LDO_PU:
shift = 9;
break;
case LDO_ARM:
shift = 0;
break;
default:
return -EINVAL;
}
old = (reg & (0x1F << shift)) >> shift;
step = abs(val - old);
if (step == 0)
return 0;
reg = (reg & ~(0x1F << shift)) | (val << shift);
writel(reg, &anatop->reg_core);
/*
* The LDO ramp-up is based on 64 clock cycles of 24 MHz = 2.6 us per
* step
*/
udelay(3 * step);
return 0;
}
int board_postclk_init(void)
{
set_ldo_voltage(LDO_SOC, 1175); /* Set VDDSOC to 1.175V */
return 0;
}
Maybe you could use this to set the voltage on your end.
Best regards
Yuri
Hi Yuri,
Thank you for your reply.
Then, would you let me know where is the above code?
And the code seems to set only VDDSOC.
Is VDDARM_CAP set by iROM and not changed by u-boot?
Best Regards,
Satoshi Shimoda
Hello Shimada-san
It is the same file in my version of uboot --> /arch/arm/cpu/armv7/mx6/soc.c
My u-boot version is u-boot-fslc-2014.10.(https://github.com/Freescale/u-boot-fslc) What version do you use?
On the example just change the code to:
set_ldo_voltage(LDO_ARM, xxxxx); // xxxxx is the voltage you want
Best Regards.
Yuri
As for power supply voltage setting, mainly it is configured
(after PMIC hardware-coded initialization at power on) in U-boot.
Please refer to “board/freescale/mx6q_sabresd/mx6q_sabresd.c”
for the SDB/SDP designs.
Further voltages also can be changed dynamically, when using DVFS.
Please look the next chapters in the Linux Reference Manual :
- "CPU Frequency Scaling (CPUFREQ) Driver"
- "Dynamic Bus Frequency Driver)"
- "PF100 Regulator Driver)"
- "Low-level Power Management (PM) Driver"
In particular, in the recent Linux BSP :
"For CPU frequency working point settings, see:
• arch/arm/boot/dts/imx6q.dtsi for i.MX 6Quad
• arch/arm/boot/dts/imx6dl.dtsi for i.MX 6DualLite
• arch/arm/boot/dts/imx6sl.dtsi for i.MX 6SoloLite
• arch/arm/boot/dts/imx6sx.dtsi for i.MX 6SoloX"
Regards,
Yuri.
Hi Yuri,
I'm using L3.10.17_1.0.2-ga, so u-boot revision is 2013.04.
And in this revision, the I cannot find the above code.
I understood I can add the above code to our u-boot.
But in this post, I want to know whether VDDARM is set by u-boot for L3.10.17_1.0.2-ga (rev 2013.04).
According to your reply, VDDARM is not set by u-boot (2013.04) default code.
Is this correct?
Best Regards,
Satoshi Shimoda