Where is the rest of the documentation on the PCIe Init Steps? How does the RC application read the config space of downstream devices?

[shefft]

Using the Imx6SDL

The steps in Figure 49-10 are described in bringing up the link but I can find nothing about the "Downstream Device Enumeration by Root Complex", the first step (1).  How does the RC application read the config space of downstream devices?

I've been trying to use the Linux driver as a guide, but it is poorly documented.  For anyone who is familiar with it, is the answer to the above found in the probe and imx6_pcie_setup_ep functions?  I can't tell if that function is for setting the device up in EP mode or not.  I'm trying to use my device in RC mode and read the config space of an attached EP device.  I'm given to understand that can be done before setting up the iATU registers, but how?  The manual seems to also imply that's possible by steps I mentioned.  Is that incorrect?

[Yuri]

Hello,

   I think the PCIe example from the i.MX6 Platform SDK would be helpful.

Please let me know Your e-mail or create request to get the SDK.

How to submit a new question for NXP Support

Have a great day,
Yuri

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