Usage of Signal M4_NMI / M7_NMI

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Usage of Signal M4_NMI / M7_NMI

ソリューションへジャンプ
605件の閲覧回数
Niebel-TQ
Contributor IV

i.MX8MQ / i.MX8MM / i.MX8MN has the opportunity tho mux this signal on PAD GPIO1_IO05. In the reference manual ist only a link to CortexM Documentation from ARM

In the implementatation of above called SOC: is this signal an input to trigger the NMI exception our an Output signalling the occurence of the exception? What is the active level of the signal - Low or High?

Thanks in Advance

Markus

 

ラベル(1)
0 件の賞賛
1 解決策
599件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Markus

 

it is input to trigger the NMI exception, active level high.

 

Best regards
igor

元の投稿で解決策を見る

0 件の賞賛
1 返信
600件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Markus

 

it is input to trigger the NMI exception, active level high.

 

Best regards
igor

0 件の賞賛