Support BT1120 progressive mode in Mx6Q

[shaojun_wang]

The HDMI receiver verified with Mx6Q is SiI9135.

Hardware connection

According "Camera Input Signal Cross Reference, Format, and Bits Per Cycle" in Mx6Q Datasheet, the pin mapping is CSIx_DAT2 ~ CSIx_DAT9 <----> C[0] ~ C[7], CSIx_DAT12 ~ CSIx_DAT19 <----> Y[0] ~ Y[7].

In "YC 4:2:2 Formats with Embedded Syncs" of SiI9135 datasheet, the pin mapping is Q16 ~ Q23 <----> Y0 ~ Y7,  Q28 ~ Q35 <----> Cb0 ~ Cb7.

So Q28 ~ Q35 of SiI9135 should be connected to CSIx_DAT2 ~ CSIx_DAT9 of Mx6Q, Q16 ~ Q22 are connected to CSIx_DAT12 ~ CSIx_DAT19 of Mx6Q.

Kernel Patch

sii9135.patch is the kernel patch to support BT1120 progressive mode.

Original Attachment has been moved to: sii9135.patch.txt.zip

[isaacnickaein]

This patch seems to be for Kernel 3.0.35 BSP. Is this patch required for Kernel 3.10.17/53 BSP too?

I am looking for a way to capture BT1120 192x1080 Interlaced video using parallel CSI on Kernel 3.10, but I cannot find any resources/patches for this.

[wuchirk]

Hi Isaac,

Did you fixe your problem?

I am also looking BT1120 interlace on iMX6Q, but I have dequeue timeout issue.

[ottob]

This works well for us capturing 720P and 1080P. It does not appear that the state of the 4 unused pins make any difference

[nealbush]

hi Shaojun

I followed the patch and try to get bt1120 progressive data .  but i can't  get the data from CSI0 .Are you sure other alternate  is not needed?

[kyu-myounglee]

Question about 16bit BT.1120 interface pin connection.

I recognized that Table 68(Camera Input Signal Cross Reference, Format, and Bits Per Cycle) in the datasheet indicates not "-" but "0" to the 4 unused data pins(CSIx_DATA00/01/10/11) for 16bit BT.1120.

It is understood that those pins should be pulled down to logic 0.

Is it really necessary to tie those pins to ground in the circuit ?

[brunolain]

Hi, did you understand this question?