Strange MMC boot behavior

[robertwood]

1. On our iMX6DL board we have a Micron MTFC4GACAJCN-4M IT, eMMC device on uSDHC3, which is DDR and byte capable. When configuring for boot, we find the processor boots when the CONFIG2(7:5) field is set to "111" or "010" but not to "110".  Now the reference manual states in Table 5-6

Bus Width:

000 - 1-bit

001 - 4-bit

010 - 8-bit

101 - 4-bit

DDR (MMC 4.4)

110 - 8-bit DDR (MMC 4.4)

Else - Reserved

What are we doing wrong or right :smileywink:

[Yuri]

Hello,

  Please try to check Your boot configuration via SRC Boot Mode Register 2 (SRC_SBMR2),

which contains bits that reflect the status of Boot Mode Pins. It may be taken from
report of i.MX6/7 DDR Stress Test Tool V2.52

The Stress Test should be run just after boot failure.

Have a great day,
Yuri

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