Specifications of the I2S of RX of IMX6DL.

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Specifications of the I2S of RX of IMX6DL.

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takashitakahash
Contributor III

Hi community.

Would you please tell me  about the specifications of the I2S of RX of IMX6DL.

Although we have with the current 16-bit received settings, what will happen to the behavior of if there is a data input of 24-bit?

[The reason]

Our customer use 24-bit output only supports devices with  external devices.

Manufacturers responded ,only 16-bit loads is no problem and without the lower 8-bit.

[Question and specification expect]

As a specification of IMX6DL, 

The capture only 16-bit data of register set in the 24-bit data, What possible lower 8-bit is set to ignore (Do not care)?

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igorpadykov
NXP Employee
NXP Employee

Hi Takashi

supported data length are given in Table 61-52. SSI Data Length IMX6SDLRM .

There is no way to set hardware "to capture only 16-bit data of register set

in the 24-bit data". One can do that is software skipping inused bits. Hardware

does not allow skip some bits, it send/receive all bits set by "WL" - Number of Bits/Word.


Best regards

igor

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591件の閲覧回数
igorpadykov
NXP Employee
NXP Employee

Hi Takashi

supported data length are given in Table 61-52. SSI Data Length IMX6SDLRM .

There is no way to set hardware "to capture only 16-bit data of register set

in the 24-bit data". One can do that is software skipping inused bits. Hardware

does not allow skip some bits, it send/receive all bits set by "WL" - Number of Bits/Word.


Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

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